Method for providing multiple reads/writes using a...

Details Method for providing multiple reads/writes using a... Method for providing multiple reads/writes using a...

2008-07-15

2008-07-15

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S189020, C365S189040, C365S230020

Reexamination Certificate

active

07400548

ABSTRACT:
Reading a plurality of consecutive entries and writing a plurality of consecutive entries with only one read address and one write address using a 2Read/2Write register file is provided. In one exemplary embodiment, a 64 entry register file array is partitioned into four sub-arrays. Each sub-array contains sixteen entries having one or more 2Read/2Write SRAM cells. A mechanism to write the consecutive entries by only having a 4 to 16 decode of one address is also provided. In addition, a mechanism for reading data from the register file array using a starting read word address and two read word lines generated based on the starting read word address is provided. The two read word lines are used to access the two read ports of the entries in the sub-arrays.

REFERENCES:
patent: 4847759 (1989-07-01), Oklobdzija
patent: 4933909 (1990-06-01), Cushing et al.
patent: 7243209 (2007-07-01), Chu et al.

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