Method for providing electrical isolation between spaced portion

Chemistry: electrical and wave energy – Processes and products

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29576R, 29580, 357 50, C25D 502, C25D 712, C25D 548

Patent

active

040367061

ABSTRACT:
A semiconductor device has a plurality of electronic elements formed in spaced portions of a layer of semiconductive material which is disposed on a substrate. Electrical isolation is provided between the spaced portions by a layer of dielectric material formed on the peripheral surfaces of the spaced portions and on the substrate. Metal is disposed on the dielectric layer in said spaces for filling the spaces and providing a planar surface. The isolation is provided by forming a dielectric layer over the surface of the semiconductor device and thereafter removing the dielectric and the semiconductive material of the layer in regions between the portions of the layer in which the elements are formed to expose the substrate. A dielectric layer is then formed on the exposed substrate and the peripheral surfaces of the spaced portions. A metal is deposited onto the semiconductor device so that metal layers are formed on the substrate dielectric and on the surface dielectric, said metal layers being electrically isolated from each other. The metal layer on the substrate dielectric is electrolytically treated to change its surface characteristics after which the untreated metal on the surface dielectric is etched using a compound that attacks the untreated metal but has little or no effect on the treated metal on the substrate dielectric. Additional metal is plated onto the metal on the substrate dielectric to fill the entire space and provide a planar surface.

REFERENCES:
patent: 3912556 (1975-10-01), Grenon et al.
patent: 3950233 (1976-04-01), Rosvold
patent: 3968565 (1976-07-01), Bertens et al.
Technical Digest -- International Electron Devices Meeting, Dec. 9, 10, 11, 1974, pp. 266-269.

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