Method for providing a vital model of a pullup/pulldown device w

Details Method for providing a vital model of a pullup/pulldown device w Method for providing a vital model of a pullup/pulldown device w

1997-03-25

1999-02-23

Teska, Kevin J.

Boots, shoes, and leggings

364578, G06F 1750

Patent

active

058751114

ABSTRACT:
A method of modeling a pullup device and a pulldown device with delay back annotation in accordance with the VITAL application specific integrated circuit modeling specification. The modeling method comprises the steps of modeling an entity and creating an identity primitive procedure which delays an input signal by a value specified in a timing generic and also preserves the signal shape. The procedure is then used to perform state pre-mapping of the incoming signal to preserve the identity of selected states (including all states). The delayed and pre-mapped signal forms the input to a VITAL state table to model the behavior of the device. The identity primitive procedure is then used to post-map the resulting signal in order to recover the selected states of the input signal. By altering the state pre- and post-mapping tables, either pullup or pulldown, both with delay back annotation may be modeled using the functions and procedures of the VITAL specification.

REFERENCES:
patent: 5581738 (1996-12-01), Dombrowski
IEEE Vital Standard ASIC Modeling Specification 1076.4, 1995.
Krolikoski, "Standardizing ASIC Libraries in VHDL Using VITAL: a Tutorial," IEEE Custom Integrated Circuits Conference, pp. 603-610, 1995.
Bakowski et al., "VHDL Sign-off Simulation : What Future?", IEEE, pp. 136-141, 1994.

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