Method for providing a selective reference layer isolation techn

Details Method for providing a selective reference layer isolation techn Method for providing a selective reference layer isolation techn

1997-04-08

1999-01-26

Powell, William

Etching a substrate: processes

Forming or treating electrical conductor article

Forming or treating of groove or through hole

216 19, 216 20, 428209, B44C 122

Patent

active

058634479

ABSTRACT:
This invention describes a new process for the selective isolation of through holes in the production of a multi-layer printed circuit card which allows for substantially smaller holes through reference layers to be built, leading to substantially better electrical isolation of signal traces on adjacent wiring layers, and for substantially improved current carrying capacity in the reference layers. This invention also describes a process to allow reference layers of different thickness from adjacent signal layers, even if they are part of the same `core`. Several different process flows are disclosed, leading to substantially the same structure but with varying degrees of complexity and quality of the finished product.

REFERENCES:
patent: 3691632 (1972-09-01), Smith
patent: 4853081 (1989-08-01), Mlynko

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