Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal phase processing
Reexamination Certificate
2005-09-20
2005-09-20
Psitos, Aristotelis M. (Department: 2653)
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal phase processing
C369S059100, C369S047280
Reexamination Certificate
active
06947365
ABSTRACT:
A method for protecting a phase lock loop (PLL) in an optical system is disclosed. The disclosed method will determine whether the currently reading data is erroneous and then maintain the frequency currently locked by the PLL circuit when the waveform lengths of the EFM signal in a detecting window contain at least one waveform length longer than 11T and at least one waveform length shorter than 3T. Otherwise, the PLL circuit will adjust the locked frequency according to the waveform length of the detected EFM signal so that the system clock frequency can be adjusted based on the locked one. In addition, when the optical system seeks tracks for reading required data under a constant angular velocity (CAV) modulation mode, the PLL circuit will increase the locked frequency gradually as the pick-up head moves towards the outer tracks of the optical disc, and decrease the locked frequency gradually as the pick-up head moves towards the inner tracks of the optical disc. Time cost for adjusting the system clock frequency can be significantly decreased based on the disclosed method.
REFERENCES:
patent: 5003557 (1991-03-01), Fujiyama
patent: 5661172 (1997-08-01), Colpaert et al.
patent: 6185172 (2001-02-01), Nakazawa
patent: 6269058 (2001-07-01), Yamanoi et al.
Lai Yi-Lin
Li Sung-Hung
Psitos Aristotelis M.
Rabin & Berdo P.C.
VIA Technologies Inc.
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