Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-12-08
2009-10-20
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180
Reexamination Certificate
active
07606078
ABSTRACT:
A method is described for programming memory cells, in particular of the Flash type. In accordance with the method, a verification is performed with a first parallelism (M) in which a reading is carried out for determining the state of a group of memory cells, a determination is performed of a programming parallelism (np), based on the results of the verification, and a real programming of the memory cells carried out with the programming parallelism (np). An architecture is also described for programming memory cells in particular of the Flash type.
REFERENCES:
patent: 6885584 (2005-04-01), Schillaci et al.
patent: 7286406 (2007-10-01), Lutze et al.
patent: 7366022 (2008-04-01), Li et al.
patent: 2002/0041516 (2002-04-01), Tran et al.
patent: 2004/0145947 (2004-07-01), Micheloni et al.
patent: 2005/0157555 (2005-07-01), Ono et al.
Nocita Edoardo
Torrisi Davide
Tumminia Alessandro
Ho Hoai V
Tran Anthan T
Trop Pruner & Hu P.C.
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