Method for programming multi-level nitride read-only memory...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030

Reexamination Certificate

active

11026947

ABSTRACT:
A method of programming data regions in a nitride read-only memory cell is described. In an erased state, the nitride read-only memory cell exhibits a low Vtvalue. A data region that is to be programmed to a highest Vtvalue is programmed first. Remaining data regions in the nitride read-only memory cell are programmed in a time order according to their descending Vtvalues. For a nitride read-only memory cell that, in an erased state, exhibits a high Vtvalue, a data region that is to be programmed to a lowest Vtvalue is programmed first with remaining data regions programmed in a time order according to their ascending Vtvalues.

REFERENCES:
patent: 6219276 (2001-04-01), Parker
patent: 6292394 (2001-09-01), Cohen et al.
patent: 6552387 (2003-04-01), Eitan
patent: 6829172 (2004-12-01), Bloom et al.
patent: 6967872 (2005-11-01), Quader et al.
patent: 7002843 (2006-02-01), Guterman et al.

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