Method for programming multi-level cell memory array

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030, C365S185240

Reexamination Certificate

active

07397705

ABSTRACT:
A method for operating a charge-trapping multi-level cell (“MLC”) memory array comprises programming a first plurality of charge-trapping sites to a preliminary first-level value, programming a second plurality of charge-trapping sites to a preliminary second-level value, and programming a third plurality of charge-trapping sites to a final third-level value using a first programming scheme. Then, the first plurality of charge-trapping sites is programmed to a final first-level value and the second plurality of charge-trapping sites is programmed to a final second-level value using a second programming scheme.

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