Method for programming and erasing a memory cell of a flash memo

Details Method for programming and erasing a memory cell of a flash memo Method for programming and erasing a memory cell of a flash memo

1998-06-26

1999-04-13

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518528, 36518529, G11C 1604

Patent

active

058944389

ABSTRACT:
The present invention provides a method for programming and erasing a plurality of flash memory cells simultaneously while the power consumptions for those operations are significantly reduced, and the method for programming a memory cell of a flash memory device, wherein the memory cell is formed on a P-well surrounded by an N-well of a semiconductor substrate, including the steps of: applying a negative voltage to a control gate of the memory cell; applying a positive voltage to a drain of the memory cell; applying a positive voltage to the P-well, wherein the voltage is the same as or lower than the voltage applied to the drain; applying a power supply voltage to the N-well; and leaving a source of the memory cell uncoupled, wherein the steps are performed either in sequence or at random.

REFERENCES:
patent: 5293212 (1994-03-01), Yamamoto et al.
patent: 5742541 (1998-04-01), Tanigami et al.

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