Method for programming a memory device suitable to minimize...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185110, C365S185180

Reexamination Certificate

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07471571

ABSTRACT:
A method programs a memory device that includes at least one memory cell matrix. The programming method the steps of: erasing the memory cells; soft programming the memory cells; and complete programming of a group of such memory cells each of them storing its own logic value. Advantageously, the first complete programming step of a group of such memory cells involves cells belonging to a block (A) of the matrix being electrically insulated from the rest of the matrix. A memory device suitable to implement the proposed method is also described.

REFERENCES:
patent: 5867429 (1999-02-01), Chen et al.
patent: 5875130 (1999-02-01), Haddad et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6252803 (2001-06-01), Fastow et al.
patent: 6735114 (2004-05-01), Hamilton et al.
patent: 2003/0002348 (2003-01-01), Chen et al.

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