Semiconductor device manufacturing: process – Making passive device
Reissue Patent
2001-03-26
2004-07-06
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Making passive device
C438S239000
Reissue Patent
active
RE038550
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of integrated circuits (IC's). More particularly, the present invention relates to programmable capacitors, and methods therefor, that render the value of the capacitor selectable during manufacturing.
Integrated circuits integrate many discrete functions and components into one “integrated” circuit. One of the reasons integrated circuits presently predominate over discrete component solutions is because of the costs involved in manufacturing, assembling, and testing discrete based circuits. For example, present day microprocessors incorporate more than one million transistors into a square package less than 5 cm on each side. The same number of transistors, discretely and separately placed on a printed circuit board, would require several orders of magnitude more space. Other advantages of integrated circuit technology, which are well known to those skilled in the art, include reliability and cost.
The miniaturization that present day integrated circuit technology, and the benefits that such technology bestows, are applicable to passive component integration as well. When passive devices, e.g., capacitors, resistors, inductors, and the like, are integrated, they are referred to herein as passive component integrated circuits.
In the design of passive thin film integrated circuits, for example, capacitors of different values are needed. By way of example, in the design of a family of filters or terminators, resistors and capacitors are combined in different configurations and values to provide different functionality and performance. In prior art, this is typically accomplished by a custom design and integrated circuit layout configuration for each type of circuit and for each value. This process is time consuming, more prone to errors and less economical.
In the description that follows, an integrated capacitor is selected for discussion. It should be borne in mine, however, that the inventive concepts herein also apply to other types of passive devices, e.g., resistors, inductors, and the like. In the prior art, when an application requires an integrated capacitor having a value that is previously unavailable, a new custom design is necessitated to create an integrated circuit having a capacitor with the desired value. This custom design approach requires a substantial amount of time, effort, and expense since a custom design with specific capacitance values and characteristics must be laid out and verified, the required masks must be created, and manufacturing steps must be tailored to fabricate the required integrated circuits. As can be appreciated from the foregoing, the custom design approach is disadvantageous in view of the great variety of device values required by modern electronic equipment.
In view of the foregoing, what is desired are passive component integrated circuit structures and methods therefor, which can implement a wide range of values in a given single design. This alleviates all the above mentioned limitations of prior art custom design approaches, thereby providing quicker design turnaround time, fewer design errors and a lower manufacturing cost.
SUMMARY OF THE INVENTION
The present invention relates, in one embodiment, to a method for endowing an integrated passive device array structure with a programmable value during manufacturing. The method includes forming a substantially conductive first layer and forming a plurality of passive device array elements of the integrated passive device array structure above the substantially conductive first layer. The method further includes forming an insulating layer above the plurality of passive device array elements. There is further included selectively forming vias in the insulating layer. The vias facilitate electrical connections between selected ones of the plurality of passive device array elements with a substantially conductive second layer subsequently deposited above the insulating layer.
In another embodiment, the invention relates to a method for forming an integrated passive device array structure having a programmable value. The method includes forming a substantially conductive first layer, and electrically coupling the substantially conductive first layer with a plurality of passive device array elements of the integrated passive device array structure. The plurality of passive device array elements is disposed above the substantially conductive first layer. There is also included electrically coupling selected ones of the plurality of passive device array elements with a substantially conductive second layer to form the integrated passive device array structure. The selected ones of the plurality of passive device array elements represent a subset of the plurality of passive device array elements.
In yet another embodiment, the invention relates to an integrated programmable passive device array structure, which includes a first node, and a plurality of passive device array elements electrically coupled to the first node. The integrated programmable passive device array structure further includes a second node electrically coupled, in a selective manner, to selected ones of the plurality of passive device array elements. The selected one of the plurality of passive device array elements represent a subset of the plurality of passive device array elements, wherein a value of the programmable passive device array structure is substantially determined by an aggregate of values of the selected ones of the plurality of passive device array elements.
In another embodiment, the invention relates to a capacitor array structure having multiple capacitor array elements. During production, the individual capacitor array elements are selected for inclusion into or exclusion out of the final capacitor structure. An included capacitor array element contributes its capacitance value to the capacitance value of the final capacitor structure. In contrast, the capacitance value of an excluded capacitor array element makes no contribution to the capacitance value of the final capacitor structure.
In another embodiment, the capacitor array elements are binary related, in accordance with this embodiment, a given array element has twice the capacitance value of its smaller counterpart. For example, the cell surface area of a successive capacitor array element increases by a factor of 2 relative to its immediately smaller counterpart. Because capacitance is proportional to the surface area of the plates forming the capacitor, by providing n distinct cells in the array structure, 2n different capacitance values may be available for each such array structure.
In accordance with yet another embodiment of the present invention, a given capacitor array element is selected for inclusion by providing it with a contact, thereby permitting an electrical path to exist between its plates and the nodes of the final capacitor structure through the provided contact. On the other hand, another given capacitor array element is excluded from the final capacitor structure when no contact is provided for it, thereby inhibiting the formation of an electrical path between its plates and the nodes of the final capacitor structure. In this manner, individual capacitor array elements of a capacitor array structure may be programmably selected for inclusion or exclusion by appropriately designing the contact mask.
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Notification of Transmittal of the International Search Report, International Searching Authority, Jul. 8, 1998
California Micro Devices, Inc.
Pillsbury & Winthrop LLP
Tsai Jey
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