Semiconductor device manufacturing: process – Making passive device
Patent
1997-10-17
1999-12-07
Tsai, Jey
Semiconductor device manufacturing: process
Making passive device
438239, H01L 218256
Patent
active
059982756
ABSTRACT:
A method for endowing an integrated passive device array structure with a programmable value during manufacturing. The method includes forming a substantially conductive first layer and forming a plurality of passive device array elements of the integrated passive device array structure above the substantially conductive first layer. The method further includes forming an insulating layer above the plurality of passive device array elements. There is further included selectively forming vais the insulating layer. The vias facilitate electrical connections between selected ones of the plurality of passive device array elements with a substantially conductive second layer subsequently deposited above the insulating layer.
REFERENCES:
patent: 4219836 (1980-08-01), McElroy
patent: 4682402 (1987-07-01), Yamaguchi
patent: 5120572 (1992-06-01), Kumar
patent: 5310695 (1994-05-01), Suzuki
patent: 5530418 (1996-06-01), Hsu et al.
patent: 5635421 (1997-06-01), Ting
patent: 5872040 (1999-02-01), Wojnarowski et al.
patent: 5872697 (1999-02-01), Christensen et al.
Notification of Transmittal of the International Search Report, International Searching Authority, Jul. 8, 1998.
International Search Report, International Searching Authority, Jul. 8, 1998.
California Micro Devices, Inc.
Tsai Jey
LandOfFree
Method for programmable integrated passive devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for programmable integrated passive devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for programmable integrated passive devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-823081