Fishing – trapping – and vermin destroying
Patent
1994-04-21
1996-06-04
Fourson, George
Fishing, trapping, and vermin destroying
437924, 148DIG12, H01L 2176
Patent
active
055232540
ABSTRACT:
A wafer bonding method for forming a SOI structure comprising the steps of bringing wafers into proximity in a state with one wafer a slight, substantially uniform clearance away from the other wafer and pressing one point of at least one wafer of the two wafers against the other wafer. In another aspect of the invention, there is provided a method of positioning for photolithography using an alignment mark portions and/or a vernier portions formed on a SOI substrate, which comprises the step of removing semiconductor layer portions corresponding to the alignment mark portions and/or the vernier portions. In further another aspect of the invention, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a new pattern of a strage node formed longitudinally along a word line. Further, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a unique strage node having a conductive side wall.
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Hashimoto Makoto
Matsushita Takeshi
Nishihara Toshiyuki
Ohokubo Yasunori
Satoh Hiroshi
Fourson George
Kananen Ronald P.
Mulpuri S.
Sony Corporation
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