Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1996-12-20
1999-05-11
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
408107, 408118, 408455, 408459, H01L21/44
Patent
active
059021187
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
Semiconductor circuits are increasingly being designed in which integrated circuits are stacked one above the other in a plurality of levels and are connected to one another. In particular, integrated circuits using different technologies are in this way combined.
Such stacks of different integrated circuits are combined in one chip casing, in particular in order to increase the packing density and to shorten the connecting paths. In this case, the substrates which contain the integrated circuits, may be composed of different substrate materials and/or may be manufactured using different technologies are in each case ground to a thickness of less than 10 .mu.m and are arranged as a stack. Contacts are formed in the vertical direction through the substrates. When viewed from the outside, such a component stack looks like a new semiconductor module. It can be implemented in a standard casing with a reduced number of connections, even though it has increased functionality.
Y. Hayashi et al., Symp. on VLSI Techn. (1990), pages 95 to 96, discloses a substrate being bonded by the front side, which comprises an integrated circuit, onto a stabilizing supporting plate in order to form a three-dimensional circuit. The substrate is subsequently ground to a thickness of less than 10 .mu.m from the rear side. Large-area depressions are produced in the rear side in order to make contact in a substrate which is adjacent in the stack, and these depressions are filled with a gold/indium alloy. The substrate is now stacked onto the adjacent substrate such that the rear side of the first substrate is adjacent to the front side, which comprises integrated circuits, of the second substrate. Tungsten pins are arranged in the front side of the second substrate and extend into the depressions, which are filled with the gold/indium alloy, as a result of which vertical contacts are implemented between the adjacent substrates. A polyimide layer is used as the adhesive layer in order to connect the two substrates mechanically.
The stabilizing supporting plate must subsequently be removed again in an expensive and risky process.
SUMMARY OF THE INVENTION
The invention is based on the problem of specifying a method for production of a three-dimensional circuit arrangement, in which the risky removal of a supporting plate is avoided.
In general terms the present invention is a method for production of a three-dimensional circuit arrangement.
An unthinned first substrate has in the region of a first main surface at least one first component having first contacts. An unthinned second substrate has in the region of a second main surface at least one second component having second contacts. The first and second substrates are joined together to form a stack such that the first main surface touches the second main surface and such that at least one first contact and one second contact touch one another. At least one of the main surfaces is provided with an adhesive layer via which the first substrate and the second substrate are firmly connected to one another. At least one of the substrates is provided with electrical connections. The first substrate is thinned from a rear side opposite the first main surface, the second substrate acting as a stabilizing supporting plate. Contact holes to the first component are opened in the rear side and are provided with rear-side contacts.
Advantageous developments of the present invention are as follows.
Metal surfaces are applied to at least one of the main surfaces. Solder metal is applied as the adhesive layer to the metal surfaces. The metal surfaces are soldered by heating to the adjacent main surface of the other substrate. Tungsten or nickel is used for the metal surfaces and gallium or indium is used for the solder metal. Additional metal surfaces which are in each case adjacent to one of the first-mentioned metal surfaces, are applied to the main surface of the respectively other substrate. The first-mentioned metal surfaces are soldered to the adjacent additiona
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patent: 5270261 (1993-12-01), Bertin et al.
patent: 5419806 (1995-05-01), Huebner
patent: 5426072 (1995-06-01), Finnila
patent: 5496743 (1996-03-01), Luryi
IEDM Techn. Dig. (1984), Promissing New Fabrication Process Developed for Stacked LSI's, M. Yasumoto et al, pp. 816-819. No Month.
VLSI Technology, 1990 Symposium on VLSI Technology, Digest of Technical Papers, Fabrication of Three-Dimensional IC Using "Cumulatively Bonded IC" (CUBIC) Technology, Y. Hayashi et al, pp. 95-96. No Month.
Nguyen Tuan H.
Siemens Aktiengesellschaft
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