Method for producing wire connections on semiconductor chips

Details Method for producing wire connections on semiconductor chips Method for producing wire connections on semiconductor chips

1999-02-10

2000-09-19

Ryan, Patrick

Metal fusion bonding

Process

Plural joints

B23K 3100, B23K 3102

Patent

active

061199265

ABSTRACT:
On the production of wire connections (wire bonding) which start from a semiconductor chip and end on a substrate (2b) the capillary (12) guiding the wire (3) should be moved to an end section (s3) of its trajectory in a specific, programmed way in order to eliminate as far as possible reactions on the geometry of the wire bridge on bonding of the wire to the substrate and to produce flawless bond connections. The end section (s3) in which the capillary (12) moves slowly begins at a predetermined height (H) and ends on the substrate at the second connection point (5). In the end section (s3) the downward movement (vv) of the capillary is superimposed by a horizontal movement (vh) which is directed away from the already existing connection of the wire (3) to the chip and which continually decreases in relationship to the downward movement (vv).

REFERENCES:
patent: 4080009 (1978-03-01), Marathe et al.
patent: 4327860 (1982-05-01), Kirshenboin et al.
patent: 4597522 (1986-07-01), Kobayashi
patent: 4730945 (1988-03-01), Luther et al.
patent: 4819326 (1989-04-01), Stannek
patent: 4932584 (1990-06-01), Yamazaki et al.
patent: 4934891 (1990-06-01), Hawkswell
patent: 4937511 (1990-06-01), Herndon et al.
patent: 4976392 (1990-12-01), Smith et al.
patent: 5023544 (1991-06-01), Vallone et al.
patent: 5024720 (1991-06-01), Boss et al.
patent: 5086559 (1992-02-01), Akatsuchi
patent: 5111989 (1992-05-01), Holdgrafer et al.
patent: 5148964 (1992-09-01), Shimizu
patent: 5152858 (1992-10-01), Winter
patent: 5156323 (1992-10-01), Kumazawa et al.
patent: 5157617 (1992-10-01), Ramsey
patent: 5158223 (1992-10-01), Shimizu
patent: 5192018 (1993-03-01), Terakado et al.
patent: 5205463 (1993-04-01), Holdgrafer et al.
patent: 5259548 (1993-11-01), Yamazaki et al.
patent: 5339939 (1994-08-01), Gueble et al.
patent: 5342460 (1994-08-01), Hidese
patent: 5380099 (1995-01-01), Teramachi
patent: 5452841 (1995-09-01), Sibata et al.
patent: 5455409 (1995-10-01), Smith et al.
patent: 5459794 (1995-10-01), Ninomiya et al.
patent: 5488771 (1996-02-01), Devitt et al.
patent: 5553376 (1996-09-01), Solanki et al.
patent: 5562384 (1996-10-01), Alvite et al.
patent: 5564188 (1996-10-01), Akasako et al.
patent: 5586713 (1996-12-01), Arita et al.
patent: 5591920 (1997-01-01), Price et al.
patent: 5694443 (1997-12-01), Stone et al.
patent: 5713125 (1998-02-01), Watanabe et al.
patent: 5768759 (1998-06-01), Hudson
patent: 5838574 (1998-11-01), Olson et al.
patent: 5838754 (1998-11-01), Olson et al.
patent: 5885052 (1999-03-01), Tsuji et al.
patent: 5941674 (1999-08-01), Briehl
patent: 5967401 (1999-10-01), Nishiura et al.

Affiliated with

Also associated with

Rating

Method for producing wire connections on semiconductor chips does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for producing wire connections on semiconductor chips, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing wire connections on semiconductor chips will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1063686