Method for producing semiconductor wafer

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state

Reexamination Certificate

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C117S089000, C117S090000, C117S094000, C117S915000

Reexamination Certificate

active

07959731

ABSTRACT:
A method for producing a semiconductor wafer, including epitaxially growing a Si1-XGeXlayer (0<X≦1) on a surface of a silicon single crystal wafer to be a bond wafer; implanting at least one kind of a hydrogen ion or a rare gas ion through the Si1-XGeXlayer and forming an ion-implanted layer inside the bond wafer; contacting and bonding a surface of the Si1-XGeXlayer and a surface of a base wafer through an insulator film; then performing delamination at the ion-implanted layer; performing a bonding heat treatment of binding the bonded surfaces; and then removing a Si layer of a delaminated layer transferred to a side of the base wafer by the delamination. Thereby, the method does not cause lattice relaxation in the SiGe layer. Therefore, the method is suitable for production of a semiconductor wafer for high-speed semiconductor devices.

REFERENCES:
patent: 2004/0126958 (2004-07-01), Usuda et al.
patent: 2004/0157409 (2004-08-01), Ghyselen et al.
patent: A 2001-217430 (2001-08-01), None
patent: A 2001-284558 (2001-10-01), None
patent: A 2003-17705 (2003-01-01), None
patent: WO 02/43153 (2002-05-01), None
patent: WO 03/046992 (2003-06-01), None
patent: WO 2004/006327 (2004-01-01), None
51 th Applied Physics Related Association Lecture Meetings, Lecture Abstracts, 28p-ZZ-6, p. 22.
51 th Applied Physics Related Association Lecture Meetings, Lecture Abstracts, 30a-YL-10, p. 414.
Christophe Maleville et al., “Smart-Cut® technology: from 300 mm ultrathin SOI production to advanced engineered substrates,” Solid-State Electronics, vol. 48, No. 6, Jun. 2004, pp. 1055-1063.

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