Method for producing semiconductor memory devices and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device

Reexamination Certificate

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C257S314000, C257S315000

Reexamination Certificate

active

07375387

ABSTRACT:
The invention provides an integration scheme for a memory cell array, especially a charge-trapping memory cell array, comprising an architecture of local interconnects, which enables to avoid nitride insulations of wordline stacks and to produce CMOS devices of different structures and dimensions in standard technology along with the tinier memory cell transistors.

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