Fishing – trapping – and vermin destroying
Patent
1990-02-07
1990-10-09
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 34, 437 59, 437 48, 437 52, 357 34, 357 43, 357 42, H01L 21265
Patent
active
049620525
ABSTRACT:
A method for producing a memory LSI having in its peripheral circuitry an MISFET of LDD structure and a vertical type bipolar transistor is disclosed. More particularly, an impurity for forming a low impurity concentration region of the said MISFET of LDD structure is introduced sideways of an emitter-base junction of the bipolar transistor. By the introduction of the said impurity, an effective impurity concentration near the base surface is reduced and the cut-off frequency of the bipolar transistor is improved.
REFERENCES:
patent: 3576475 (1971-04-01), Kronlage
patent: 4047217 (1977-09-01), McCaffrey
patent: 4475279 (1984-10-01), Gahle
patent: 4717686 (1988-01-01), Jacobs
Asayama Kyoichiro
Kobayashi Yutaka
Miyazawa Hiroyuki
Yukutake Seigou
Chaudhuri Olik
Hitachi , Ltd.
McAndrews Kevin
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