Method for producing semiconductor device, method for...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – Including change in a growth-influencing parameter

Reexamination Certificate

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C117S089000, C117S954000, C438S029000, C438S039000, C438S040000, C438S041000, C438S761000

Reexamination Certificate

active

06358316

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods for producing semiconductor devices, semiconductor lasers, and quantum wire structures, an apparatus for producing semiconductor devices, and crystal growth methods, and more particularly to methods including a dry etching process and an epitaxial growth process.
BACKGROUND OF THE INVENTION
Recently, in manufacturing semiconductor laser diodes or quantum wire structures, a fine structure producing technique utilizing etching and regrowth has been developed. More specifically, this technique includes selectively etching away a portion of a crystal layer and growing an epitaxial layer on the surface of the crystal layer exposed by the etching, which epitaxial layer is electrically and optically different from the crystal layer, whereby a desired electronic state is achieved. In this process, forming a fine structure in desired shape with high controllability and maintaining a clean regrowth interface are very important. Especially when AlGaAs is employed as a material of the device, since Al is an easily oxidizable material, an oxide film formed on the surface adversely affects the etching process, resulting in a fine structure of unwanted shape. In addition, since the regrowth interface is contaminated, the quality of a regrown crystal layer is significantly deteriorated. These problems must be solved when the technique is employed in the manufacture of the devices.
Japanese Published Patent Application No. 58-53834 discloses a prior art method for etching an AlGaAs layer by reactive dry etching. In this method, a GaAs cap layer disposed on the AlGaAs layer prevents the surface of the AlGaAs layer from being oxidized. This prior art describes that a favorable AlGaAs etching is achieved for the first time when the reactive dry etching is performed from the GaAs cap layer. Japanese Published Patent Application No. 61-184892 also discloses an AlGaAs etching method employing a GaAs cap layer. In this prior art, the AlGaAs layer with the GaAs cap layer is etched by HCl gas.
A description is given of problems in the prior art AlGaAs etching method employing the GaAs cap layer.
FIGS.
30
(
a
)-
30
(
c
) and
31
(
a
)-
31
(
c
) are sectional views for explaining experiments conducted to confirm the effects of the prior art AlGaAs etching method. In the figures, reference numeral
1
designates a regrown GaAs layer, numeral
2
designates an Al
x
Ga
1−x
As layer, numeral
23
designates a GaAs substrate, and numeral
211
designates a GaAs cap layer. A first sample and a second sample are formed according to the process steps illustrated in FIGS.
30
(
a
)-
30
(
c
) and FIGS.
31
(
a
)-
31
(
c
), respectively.
Initially, as illustrated in FIG.
30
(
a
), the Al
x
Ga
1−x
As layer
2
and the GaAs cap layer
211
are successively grown on the GaAs substrate
23
by MOCVD (first crystal growth of the first sample). On the other hand, in the step of FIG.
31
(
a
), only the Al
x
Ga
1−x
As layer
2
is grown on the GaAs substrate
23
by MOCVD (first crystal growth of the second sample). The Al
x
Ga
1−x
As layer
2
is 2 &mgr;m thick and the GaAs cap layer
211
is 0.1 &mgr;m thick. The first and second samples are taken out from the reaction chamber and left in the air for a few days. Thereafter, each of the first and second samples is etched by 1 &mgr;m from the surface using HCl gas (FIGS.
30
(
b
) and
31
(
b
)) and, subsequently, in the same reaction chamber, the GaAs layer
1
is grown to 2 &mgr;m by MOCVD (FIGS.
30
(
c
) and
31
(
c
)).
FIGS.
32
(
a
) and
32
(
b
) illustrate SIMS (Secondary Ion Mass Spectroscope) profiles of impurity ion concentrations in the vicinity of the regrowth interface, i.e., the interface between the Al
x
Ga
1−x
As layer
2
and the regrown GaAs layer
1
. FIG.
32
(
a
) illustrates the SIMS profile of the first sample shown in FIG.
30
(
c
) and FIG.
32
(
b
) illustrates the SIMS profile of the second sample shown in FIG.
31
(
c
). In the figures, reference numeral
1
designates the regrown GaAs layer, numeral
2
designates the Al
x
Ga
1−x
As layer, and numeral
3
designates the regrowth interface. In both samples, segregations of oxygen (O) and chlorine (Cl) are observed in the vicinity of the regrowth interface. In addition, the dislocation density of the regrown GaAs layer
1
of the first sample is 5×10
5
/cm
2
and that of the second sample is 5×10
8
/cm
2
.
These results are construed as follows. In the second sample, since the etching is started from the Al
x
Ga
1−x
As layer
2
whose surface is oxidized, the oxide film on the surface reacts with Cl during the etching, and the products are attached to the wafer surface and segregated on the regrowth interface
3
. The segregations of O and Cl on the regrowth interface
3
adversely affect the quality of the regrown GaAs layer
1
.
On the other hand, in the first sample with the GaAs cap layer
211
, since the cap layer prevents the surface of the Al
x
Ga
1−x
As layer
2
from being oxidized, segregations of O and Cl in the vicinity of the regrowth interface
3
are reduced compared to the second sample, which means that the GaAs cap layer
211
improves the quality of the regrown GaAs layer
1
.
However, the segregations of O and Cl on the regrowth interface are not completely prevented by the GaAs cap layer as shown in FIG.
32
(
a
), and the dislocation density of the regrown GaAs layer of the first sample, i.e., 5×10
5
/cm
2
, is, by one order of magnitude, higher than 1×10
4
pieces/cm
2
that is a typical dislocation density required for a compound semiconductor device. This result shows that even a slight oxide film formed on the surface of the GaAs cap layer causes the segregations of O and Cl on the regrowth interface.
That is, the GaAs cap layer alone cannot provide a clean regrowth interface of the AlGaAs layer. Therefore, it is difficult to attain a clean regrowth interface and a high-quality regrown GaAs layer by the prior art etching method disclosed in Japanese Published Patent Application No. 58-53834.
FIG. 34
is a schematic diagram for explaining a vapor phase etching method disclosed in Japanese Published Patent Application No. 62-153199. In the figure, reference numeral
241
designates a reactor, numeral
242
designates a pedestal, numeral
243
designates a semiconductor substrate, numeral
244
designates a resistance heating means, numeral
245
designates a bypass pipe, numeral
246
designates a low temperature region, numeral
247
designates a high temperature region, and numeral
248
designates an etching gas inlet.
In this etching method, initially, HCl gas is sufficiently applied to the surface of the semiconductor substrate
243
in the low temperature region
246
. Then, the substrate
243
is moved to the high temperature region and, after a prescribed time, it is returned to the low temperature region
246
. This is one cycle of the etching process. In the low temperature region
246
at about 400° C., the substrate
243
is not etched by the HCl gas but Cl is adsorbed by the substrate. When the substrate is moved to the high temperature region
247
at about 600° C., the adsorbed Cl escapes from the surface as GaCl
3
, whereby a monomolecular layer level etching is carried out with high controllability.
However, this prior art vapor phase etching method has the following drawbacks.
In this etching method, the wafer is moved between the low temperature region and the high temperature region and, in each region, it is left for a prescribed time until the substrate temperature reaches a desired temperature. Therefore, one cycle of the etching takes a few minutes, providing a very low etching rate. In addition, since it is difficult to control separations of As atoms and Ga atoms from the GaAs surface separately from each other, the etching is not smoothly carried out.
FIG. 35
is a sectional view illustrating a quantum wire laser structure disclosed in Applied Physics Letters, 55(1989), pp. 2715-2717. In the figure, referenc

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