Method for producing semiconductor device having alignment mark

Details Method for producing semiconductor device having alignment mark Method for producing semiconductor device having alignment mark

1994-01-19

1996-01-09

Maples, John S.

Fishing, trapping, and vermin destroying

437194, 437195, 437924, 148DIG102, H01L 21441

Patent

active

054828937

ABSTRACT:
An alignment method for a semiconductor device having a conductive thin film on a conductive substrate surface across an insulation film, comprises steps of:

REFERENCES:
patent: 4630357 (1986-12-01), Rogers et al.
patent: 4641420 (1987-02-01), Lee
patent: 5083364 (1992-01-01), Olbrich et al.
patent: 5179042 (1993-01-01), Mikoshiba et al.
Patent Abstracts of Japan, vol. 8, No. 142, an English Abstract published Jul. 3, 1984 of Japanese Patent No. 59-52867.
"Multilevel Metal Direct Write Registration", IBM Technical Disclosure Bulletin, E. Berndlmaier et al., vol. 24, No. 7B, Dec. 1981.
"Alignment Aid for Stud Up Technology", Research Disclosure, No. 303, Jul. 1989, p. 494.
Research Disclosure No. 30327, "Alignment Aid for Stud up Technology", Published Jul. 1989.

Affiliated with

Also associated with

Rating

Method for producing semiconductor device having alignment mark does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for producing semiconductor device having alignment mark, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing semiconductor device having alignment mark will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1302899