Fishing – trapping – and vermin destroying
Patent
1989-06-02
1993-03-09
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 89, 437103, H01L 21205
Patent
active
051926806
ABSTRACT:
A method for producing a semiconductor device containing steps of forming a stepped pattern on the surface of a semiconductor substrate and forming a gaseous grown crystal layer thereon, which comprises positioning an alignment pattern (for example 6c) included in the first-mentioned pattern diagonally with respect to an in-plane direction of faster pattern growth in said gaseous crystal growth.
REFERENCES:
patent: 4131496 (1978-12-01), Weitzel et al.
patent: 4141765 (1979-02-01), Druminski et al.
Ueda et al., "A New Vertical Power MOSFET Structure With Extremely Reduced On-Resistance," IEEE Trans. on Electron Devices, vol. ED-32, No. 1, Jan. 1985.
Wolf et al., Silicon Processing for the VLSI Era, vol. 1--Process Technology, Lattice Press, 1986, pp. 1-5.
Momma Genzo
Naruse Yasuhiro
Yuzurihara Hiroshi
Canon Kabushiki Kaisha
Wilczewski Mary
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