Method for producing insulator structures including a main...

Details Method for producing insulator structures including a main... Method for producing insulator structures including a main...

2006-05-30

2006-05-30

Flynn, Nathan J. (Department: 2826)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S400000, C438S424000

Reexamination Certificate

active

07052970

ABSTRACT:
In order to produce insulator structures (8), insulator trenches (21) with aspect ratios of greater than 4:1 are introduced into a semiconductor substrate (1) from a substrate surface (10) and filled with an insulator filling (3). The insulator filling (3) is formed from a plurality of portions (31, 32, 33, 34) which are deposited successively in situ in an HDP/CVD process chamber in the course of an HDP/CVD deposition process. A main layer (33) is provided made from fluorine-doped silicon oxide with good filling properties. A barrier layer (32) is formed directly before the deposition of the main layer (33), said barrier layer preventing an outgassing of the fluorine from the fluorine-doped silicon oxide (33), an interaction of the fluorine with the semiconductor substrate (1) and a formation of defect areas (6) with oxide of low quality in the area of the insulator filling (3). The barrier (32) makes it possible to form nondegrading p-channel transistors (73) in the area of the substrate surface (10). An additional layer (31) and a termination layer (34) respectively effect an adaptation and linking of the main layer (33) and of the barrier layer (32) to preceeding and succeeding process steps.

REFERENCES:
patent: 6033970 (2000-03-01), Park
patent: 6037018 (2000-03-01), Jang et al.
patent: 6057209 (2000-05-01), Gardner et al.
patent: 6744113 (2004-06-01), Kuroi et al.
patent: 102 28 691 A 1 (2003-03-01), None
patent: 0 936 665 (1999-08-01), None

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