Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
1998-09-30
2002-07-16
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S777000
Reexamination Certificate
active
06420781
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for producing an emulation circuit configuration from an integrated circuit, and to a configuration having two integrated circuits.
Developing applications systems that include integrated circuits require driving certain circuits, especially microprocessors or micro-controllers, in the applications system in real time. This involves monitoring many electrical and chronological sequences, not accessible during later operations, within the circuit itself, which is known as in-circuit emulation (ICE).
The application system can be tested, optimized, and further developed together with the micro-controller.
Producing a variant of a mass-produced circuit suitable for in-circuit emulation is problematic. Until now, a bond-out version was made, in which additional internal signals can be picked up externally. A circuit periphery with external components is also created, by which interrupt points in the program sequence can for instance be set and data and/or program memories varied and register states recorded over the course of time. An operator computer forms the interface with the developer.
The effort and expense for producing an emulation circuit is extraordinarily high. Compared with mass production techniques, it typically involves considerable delay. Furthermore, the emulation circuit has a different operating behavior over time compared with the mass-produced circuit, and this pertains particularly to unwanted signals and makes troubleshooting more difficult.
In the literature by M. Yasumoto et al, “Promising New Fabrication Process Developed for Staged LSI's”, IEDM 84, pp. 816-819, a configuration of two integrated circuits that are interconnected at their surfaces facing one another is shown. The respective contact faces accessible at the surface are located one over the other and are bonded via gold contact points. The two circuits each contain only transistors of one type, and together they form a ring oscillator. One of the circuits contains external contacts.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for producing an emulation circuit configuration, and a configuration with two integrated circuits, which overcome the above-mentioned disadvantages of the prior art methods and devices of this general type, which is simple to produce.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing an emulation circuit configuration from an integrated circuit, which includes: providing an integrated circuit including a first wiring layer having conductor tracks with widened portions functioning as contacts; applying a further wiring layer having conductor tracks to the integrated circuit; connecting the conductor tracks of the further wiring layer to the widened portions of the first wiring layer; providing contact faces on the conductor tracks of the further wiring layer for allowing access to additional output signals provided in addition to regular output signals of the integrated circuit; and connecting the contact faces of the further wiring layer to external chip connections.
The effort and expense for the additional production process steps for the emulation variant, compared with the mass-produced chip, are tolerable. The additional effort and expense to the mass-produced chip, for instance for the contacting faces in the uppermost wiring plane needed for the emulation variant, require hardly any space. It is advantageous that the mass-produced chip and the emulation variant thereof are based on the same starting chip and therefore have virtually identical operating behavior over time.
Expediently, a second circuit is provided for picking up internal signals. It is applied to the mass-producted chip, enhanced by the additional production process steps, by a method that relies on the flip-chip technique.
The additional second chip contains suitable circuits for interrupt points, observation channel memories, ROM emulation memories, and signal drivers. Furthermore, it can be used for different mass-produced chips, as long as their contact faces are disposed in the same grid pattern in the uppermost, additional wiring plane and furnish the various corresponding signals. The emulation circuit configuration is therefore available quickly and at reasonable expense and behaves virtually identically to the mass-produced chip. Because of the close spatial coupling with a ROM emulation memory, a maximum system operating speed can be attained.
In accordance with an added feature of the invention, there is the step of placing a further integrated circuit having input signal terminals and contact faces above the further wiring layer, and electrically conductively connecting the input signal terminals of the further integrated circuit to the contact faces of the further wiring layer of the integrated circuit.
In accordance with an additional feature of the invention, there is the step of forming contact lugs on the contact faces of the further wiring layer that correspond in position to the contact faces of the further integrated circuit, and connecting the contact lugs with the contact faces of the further integrated circuit.
In accordance with an another feature of the invention, there are the steps of: forming peripheral lands on the further integrated circuit; and enclosing the integrated circuit and the further integrated circuit in a package having external terminals and connecting the peripheral lands to the external terminals for outputting output signals.
In accordance with an additional feature of the invention, there is the step of connecting the contact faces of the further wiring layer of the integrated circuit to a terminal for a supply potential via the conductor tracks each having a portion with a reduced cross-sectional area, and subsequently severing the portion with the reduced cross-sectional area of the conductor tracks with a current pulse impressed via the further integrated circuit.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a configuration having two integrated circuits, including: a first integrated circuit having an uppermost wire layer with contact faces and a given area; a second integrated circuit disposed on the first integrated circuit and having contact faces corresponding in position to the contact faces of the first integrated circuit, the second integrated circuit further having an area larger than the given area of the first integrated circuit and periphery lands forming external contact terminals; and an electrically conductive material connecting the contact faces of the first integrated circuit to the contact faces of the second integrated circuit.
In accordance with an added feature of the invention, the electrically conductive material connecting the contact faces of the first integrated circuit to the contact faces of the second integrated circuit are contact lugs.
In accordance with an additional feature of the invention, the first integrated circuit and the second integrated circuit each have a surface at which respective contact faces are accessible and face one another.
In accordance with another feature of the invention, a number of the contact faces of the first integrated circuit form a grid-shaped configuration having equal spacings between the contact faces in one direction.
In accordance with a further added feature of the invention, the first integrated circuit includes one of a microprocessor and micro-controller each having registers, and the second integrated circuit having at least one function element selected from the group consisting of driver circuits connected to the periphery lands for external access, an observation channel memory for an in-circuit emulation connected to the registers, a program emulation memory for an in-circuit emulation, and logic circuits for setting and monitoring interrupt points of an emulation program.
In accordance with a further addition
Mayer Albrecht
Von Wendorff Wilhard
Cao Phat X.
Greenberg Laurence A.
Infineon-Technologies AG
Locher Ralph E.
Stemer Werner H.
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