Electrical connectors – Including arc suppressing or extinguishing means – By arc suppressing or extinguishing environment
Patent
1995-01-05
1996-12-10
Fourson, George
Electrical connectors
Including arc suppressing or extinguishing means
By arc suppressing or extinguishing environment
437190, 437230, H01L 2128
Patent
active
055830730
ABSTRACT:
The present method for producing a barrier layer and a solder bump on a chip includes: a) providing a silicon chip with a bump base; b) forming a metal pad, e.g. an aluminum pad, on the bump base; c) having the metal pad contact with a solution containing about 120.about.150 g/l NaOH, 20.about.25 g/l ZnO, 1 g/l NaNO.sub.3 and 45.about.55 g/l C.sub.4 H.sub.4 KNaO.sub.6 .multidot.4H.sub.2 O to form thereon a zinc layer, and preferably further containing tartaric acid for reducing a dissolving rate of the metal pad.; d) having the zinc layer contact with a deposition solution to deposit thereon an electroless barrier layer, e.g. an electroless Ni-P layer; and e) dipping the resulting silicon chip into a molten solder bath to form a solder bump on the electroless barrier layer. The present invention is a simple process for manufacturing an electroless Ni-P and a solder bump on a chip.
REFERENCES:
patent: 4122215 (1978-10-01), Vratny
patent: 4162337 (1979-07-01), D'Asaro et al.
patent: 4372996 (1983-02-01), Guditz et al.
patent: 5236873 (1993-08-01), Anceau et al.
M. Inaba, K. Yamakawa, and N. Iwase, "Solder Bump Formation Using Electroless Plating and Ultrasonic Soldering", IEEE Transactions on Components, Hybrids, and Manufacturing Technology, vol. 13, No. 1, 119, Mar. 1990.
K. Wang, K. Chi and A. Rangappan, "Application of Electroless Nickel Plating in the Semiconductor Microcircuit Industry", Plating and Surface Finishing, 70, Jul. 1988.
Lee Chwan-Ying
Lin Kwang-Lung
Bilodeau Thomas G.
Fourson George
National Science Council
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