Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
2002-07-03
2004-04-27
Dinkins, Anthony (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S311000, C257S295000
Reexamination Certificate
active
06728093
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention pertains to ferroelectric capacitors and integrated circuit memory devices, and, more particularly, to textured electrodes for ferroelectric capacitors.
The term “texture” or “textured” generally refers to the crystallographic orientation of the material being discussed, and is not to be confused with the surface smoothness of the material. Specifically, the texture of the electrode and dielectric material being discussed refers to the crystallographic orientation of the material in the “Z-axis” and does not generally describe the orientation of the material in the X or Y axes (parallel to the surface of the integrated circuit). In fact, the grain structure of the material is generally random in the X or Y axes, yet it is ordered in the preferred orientation in the Z-axis of the material for maximizing electrical performance as is disclosed in greater detail below with respect to the description of the invention.
One possibility for improving the electrical performance of a ferroelectric memory is by texturing the ferroelectric dielectric material. Referring now to
FIG. 1
, a typical prior art ferroelectric capacitor
10
is shown including a substrate
12
, a bottom electrode
14
, a Perovskite ferroelectric dielectric layer
16
such as Pb(Zr
1-X
Ti
X
)O
3
(“PZT”), and a top electrode
18
. The bottom electrode layer
14
and top electrode layer
18
are typically platinum or iridium. It is desirable for ferroelectric dielectric layer
16
to have a texture that maximizes electrical performance, and not a random grain structure. The use of a textured dielectric layer helps to maximize signal strengths and minimize operating voltage distribution since the polarization vector of all of the grains in the layer are oriented in the same direction. This is especially important if, as is required in integrated circuit memories, the capacitor area is very small (<1 &mgr;m
2
) and the number of grains is also small (<50 grains). Randomly distributed grain orientation in the Z-axis of the dielectric film substantially affects signal strength and electrical memory performance.
Presently available bottom electrode structures and processing methods do not support a textured PZT ferroelectric dielectric layer and therefore process control and narrow single-bit signal distributions cannot be achieved for high density memories. With randomly oriented materials, the distribution in bit signals is large for capacitor sizes approaching the grain size of the PZT layer (typically 0.1-0.3 &mgr;m) since the switchable polarization is a vector property linked with specific crystal directions.
In particular, it has also been found that it is difficult to maintain good PZT crystallographic texture on iridium metal bottom electrodes. Iridium metal is oxidized when it is exposed to air or oxygen-containing environments. Currently, after iridium deposition, the iridium is typically exposed to air, resulting in a surface layer of IrO
X
that does not provide the proper template for textured PZT growth. While it may be possible to prevent iridium oxidation by directly depositing the PZT after iridium deposition and avoiding a vacuum break, the oxygen present in the PZT and the atmosphere used to deposit PZT can also cause iridium oxidation in an uncontrolled manner.
Exposure, therefore, of an iridium bottom electrode to atmosphere causes surface oxidation of the iridium. This surface oxidation causes an undesirable non-oriented PZT dielectric layer to be formed. Current platinum technology does not prevent oxygen diffusion through the bottom electrode. This, in turn, does not allow protection of contacts that lie below the bottom electrode in a capacitor-on-plug FRAM® memory architecture.
What is desired, therefore, is a bottom electrode structure for a ferroelectric capacitor that supports the growth of a properly textured ferroelectric dielectric film.
SUMMARY OF THE INVENTION
According to the present invention, a method is described for producing crystallographically textured electrodes for making ideally textured PZT capacitors for enhanced ferroelectric memory performance. The use of seed layers originating from hexagonal crystal structures with {0001} texture provides a template with a smooth surface for growth of {111} textured iridium, which exhibits the face-centered cubic (“FCC”) structure. This seeding technique results in {111} textured iridium with a small surface roughness relative to the film thickness. The highly textured iridium acts as a template for {111} textured PZT growth. Textured PZT exhibits enhanced switched polarization, reduced operating voltage and also improves the reliability of PZT capacitors used in FRAM® memory and other microelectronic devices.
One advantage of using iridium is that iridium provides a barrier against oxygen diffusion. When the PZT capacitor is formed on top of a tungsten, silicon, or other plug material, oxidation of the plug is ideally prevented (or at least limited) to avoid excessively high contact resistance between the plug and the capacitor. Capacitor-over-plug architectures are normally required for high density memories that incorporate small capacitors (<1 &mgr;m
2
). It is therefore desirable to maintain a textured PZT layer to have a maximum switching signal, low operating voltage and a narrow distribution in bit-to-bit response. With textured materials, all capacitors substantially exhibit the same switchable polarization since all the PZT grains exhibit the same texture.
During vapor phase deposition, materials with hexagonal crystal structures have a natural growth habit such that the basal plane, i.e., the {0001} plane, prefers to grow parallel to the surface of a planarized substrate. This growth habit results in the formation of {0001} textured films with smooth surfaces that terminate on the {0001} plane. This smooth {0001} lattice plane in turn provides an ideal growth surface for growth of a smooth subsequent layer. In addition, the basal planes of hexagonal structure materials are close-packed planes that provide for an excellent template for growth of {111} textured films exhibiting an FCC crystal structure. The {111} planes in the FCC structure are also close-packed planes. In fact, the only difference between hexagonal close-packed structures and face-centered cubic structures is the stacking sequence of the close-packed planes. ABC stacking is exhibited in FCC structures and AB stacking is exhibited in HCP structures. The FCC (111) plane can have a good lattice match with the HCP (0001) plane. A mismatch as large as 25% can be accommodated between the FCC (111) and HCP (0001) lattice while still assuring that the HCP (0001) lattice acts as a seed for textured growth of the FCC (111) lattice. The mismatch is given by:
2
a
H
-
2
a
F
2
a
F
where a
H
is the unit cell parameter for the hexagonal basal plane of the seed layer and a
F
is the unit cell parameter for the FCC electrode layer.
Since the HCP seed layer is textured, the lattice match of the FCC and HCP structures introduce a texture of the FCC material. The lattice match between the FCC (111) and HCP (0001) planes is confined within a single grain; therefore the FCC layer exhibits a {111} texture perpendicular to the plane of the substrate, but the grains are randomly oriented with respect to relative rotations within the plane of the substrate.
Tetragonal seed layers that form a distorted hexagonal sub-lattice can also be used to achieve textured Ir films. Such films can be formed by using thermal oxidation or nitridation of smooth {0001} as-grown hexagonal metal films, resulting in alternative oxide and nitride based seed layers with smooth surfaces. These oxide and nitride seed layers can also be used to achieve better lattice matching with FCC electrodes and therefore result in improved texture of the FCC electrode film. Formation of compound hexagonal and tetragonal seed layers can
Dinkins Anthony
Ramtron International Corporation
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