Method for producing an electrically conducting connection

Details Method for producing an electrically conducting connection Method for producing an electrically conducting connection

2001-08-28

2004-03-23

Vo, Peter (Department: 3729)

Metal working

Method of mechanical manufacture

Electrical device making

C029S847000, C216S018000, C438S634000, C438S643000, C438S744000

Reexamination Certificate

active

06708405

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for producing electrically conducting connections through one or more insulating layers such as, for example, can be used to connect storage capacitors to the selection transistors in highly integrated FRAMs and DRAMs.
In highly-integrated assemblies, electrically conducting connections and/or contacts generally serve to permit a flow of electric current between electrically conducting sections which are located in different pattern levels. In accordance with the material of the upper and lower conducting pattern levels, there are, for example, silicon/silicon contacts, metal/silicon contacts or metal/metal contacts.
A damascene process is frequently applied to produce such contacts. For this purpose, a contact hole is etched with the aid of a photolithographic step through one (or more) insulating layer(s) down to a connection situated therebelow. This is followed by coating with a conducting material, mostly doped polysilicon, which fills up the etched contact hole completely. Subsequently, the conducting layer is removed as far as down to the insulating layer with the aid of a CMP step (Chemical-Mechanical Polishing) such that only a conducting filling (plug) remains in the etched hole. The plug in this way makes a conducting connection from the top side of the insulating layer to the underside of the insulating layer.
For some contacts such as, for example, for contacts made from polysilicon, which connect a noble metal electrode of a storage capacitor to the diffusion zone of a selection transistor, however, there is still a need for one or more additional conducting layers which are intended to prevent, for example, the diffusion of oxygen atoms or metal atoms into or through the contact. Typical barrier layers are, for example, iridium or iridium oxide. As a rule, the polysilicon is removed by an etching step from an upper part of the contact hole in order to produce the barrier. Subsequently, barrier material is deposited and patterned by means of a CMP step such that the barrier material remains only in the upper part of the contact hole. The barrier material is preferably deposited in this case by a sputtering method.
Unfortunately, the problem arises with this mode of procedure that filling up the contact hole with the barrier material becomes ever more difficult because of the ever smaller diameter of the contact holes. The result of this is either that it is necessary to have recourse to other, more expensive deposition methods, for example CVD methods, or that it is necessary to use an additional phototechnique to produce a depression with a larger diameter overlapping the contact hole. Both alternatives are attended by increased production costs, however.
In the case of some assemblies, for example FeRAMs, two barrier layers are generally used between the polysilicon and the lower electrode layer of the storage capacitor. The first barrier layer covers the polysilicon of the contact and generally prevents the diffusion of silicon atoms through the barrier. The second barrier layer covers the first barrier layer and generally prevents the diffusion of oxygen through the barrier. In some circumstances, a liner layer is still necessary between the polysilicon and first barrier layer, which makes an effectively conducting bonding connection between the polysilicon and first barrier layer. It frequently happens, furthermore, that the insulating layer consists of at least two silicon oxide layers, which have a different etching behavior.
If, in this regard, an electrically conducting connection is made from the lower electrode of a storage capacitor to a selection transistor, a range of further problems arise.
Void formation: because of the different etching rates of the two insulating layers, during etching of the contact hole, and/or during wet cleaning steps before filling up with the conducting filling material, a step is produced in the contact hole along the contact area of the two insulating layers. In the case of small contact hole diameters, during the subsequent coating process with the conducting filling material this step easily leads to incomplete filling which can lead to void formation, as is shown in FIG.
1
. In
FIG. 1
, the lower insulating layer
1
on the semiconductor substrate
5
consists of a BPSG silicon oxide, while the upper insulating layer
2
consists of a silicon oxide produced using the TEOS process. An etching step or a wet cleaning step before the filling of the contact hole
6
produces a step in the contact hole
6
at the boundary layer between the two oxide layers. The conducting filling layer
3
consists of polysilicon. The void
4
is produced during coating with the polysilicon by virtue of the fact that the opening of the upper oxide layer is sealed before complete filling because of the smaller diameter.
Overetching trenches: in order to apply the second barrier layer to the first barrier layer in the contact hole region with the aid of the damascene method, it is necessary to structure on the substrate a mask which must have a corresponding opening at the feed-through. Because of a lack of control options, for example, instances of overetching can easily occur as the mask is being etched in this process, such that etching proceeds laterally past the first barrier layer, resulting in the formation of a trench next to the first barrier layer. This overetching trench can, for example, cause the second barrier layer, which is still to be applied, at the edge to come into contact in the opening with the liner or with the polysilicon such that oxidation of the polysilicon or other undesired chemical reactions occur which can lead to contact problems.
FIG. 2
a
and
FIG. 2
b
show two conditions under which overetching trenches can be produced in an insulating layer
10
: in
FIG. 2
a,
the mask opening is larger than the surface of the first barrier layer
11
and adhesion-promoting layer
12
, such that an overetching trench
15
is formed around the first barrier layer
11
and the adhesion-promoting layer
12
. A following second barrier layer would fill the overetching trench
15
and come into contact with the liner. In
FIG. 2
b,
an overetching trench
15
is produced laterally by a misalignment of the mask opening with reference to the surface of the first barrier layer
11
and the adhesion-promoting layer
12
. A second barrier layer would fill the overetching trench and, in this example, come into contact with the liner
12
and the polysilicon filling
13
.
Dielectric close-off: for a good and effectively conducting adhesive contact on the polysilicon layer, the first barrier layer usually requires an adhesion-promoting layer, preferably a liner, as interlayer. However, the liner can react chemically upon contact with the second barrier layer, and this can lead to a dielectric close-off. The liner should therefore also not be in contact with the lower electrode or the capacitor dielectric. During the production of the barrier layers, it must therefore be ensured that the liner and second barrier layer do not come into contact. FIG.
3
and
FIG. 4
show two variants of a conducting connection through an insulating layer
10
on a semiconductor substrate
5
according to the prior art, in the case of which the undesired contacts between the adhesion-promoting layer
12
and second barrier layer
17
occur. In
FIG. 3
, a platinum layer
18
is applied to the second barrier layer
17
, which rests, in turn, on a first barrier layer
11
, an adhesion-promoting layer
12
and a polysilicon layer
13
. The critical transition points between second barrier layer
17
and adhesion-promoting layer
12
are situated at the edge of the adhesion-promoting layer. The problem in
FIG. 4
scarcely differs.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method of producing an electrically conductive connection, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this

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