Metal working – Method of mechanical manufacture – Electrical device making
Patent
1996-08-13
1998-01-13
Coan, James F.
Metal working
Method of mechanical manufacture
Electrical device making
29846, 174259, 174263, H01L 25065, H01L 2160
Patent
active
057065780
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
Semiconductor circuits are increasingly being designed in which integrated circuits are stacked one above the other in a plurality of planes and are connected to one another. Integrated circuits from various technologies are, in particular, combined in this way.
In order to increase the packing density and to shorten the connecting paths, such stacks of different integrated circuits are combined in one chip casing. In this case, the substrates including the integrated circuits, which may be composed of different substrate materials and/or may be manufactured using different technologies are in each case ground to a thickness of a few tens of micrometers and are arranged as a stack. Contacts are formed in the vertical direction through the substrates. Such a component stack when viewed from the outside appears as a new semiconductor module. It can be implemented in a standard casing with a reduced number of connections, even though it has increased functionality.
It is known from Y. Hayashi et al., Symposium on VLSI Technology (1990) pages 95 and 96 for a polyimide layer to be used as an adhesive layer for the mechanical joint between adjacent substrates. The vertical contacts between adjacent substrates are implemented via tungsten pins and associated large-area depressions which are filled with a gold/indium alloy. The tungsten pins enter these filled depressions when the upper substrate and the lower substrate are being stacked one above the other. They are soldered at 300.degree. to 400.degree. C. In this case, the two planes exhibit different thermal expansions and this leads to a lateral shift of the metal contacts, which can be sheared off at the same time.
As a result of the increased packing densities in three-dimensional integrated circuit arrangements, the heat losses to be dissipated rise in such a component stack. The polyimide layer scarcely makes any contribution to the dissipation of the heat losses, so that they must be dissipated via the tungsten pins and the substrates themselves.
SUMMARY OF THE INVENTION
The invention is based on the problem of specifying a method for producing a three-dimensional circuit arrangement, by means of which method a three-dimensional circuit arrangement can be produced in which mechanical stresses, which are caused by different thermal expansions when the substrates are connected, are reduced.
In general terms the present invention is a method for producing a three-dimensional circuit arrangement. A first substrate and a second substrate, each of which having at least one component with contacts, are arranged one above the other in a stack. The metal surfaces are applied onto that main surface of at least one of the substrates which is adjacent to the other substrate. The metal surfaces are soldered to the adjacent main surface of the other substrate by application of solder metal and heating. The solder metal mixes completely with the material of the metal surfaces so that an intermetallic phase is formed. A firm joint is produced between the first substrate and the second substrate. The materials of the metal surfaces and the solder metal are matched to one another such that the melting temperature of the intermetallic phase is higher than the operating temperature of the three-dimensional circuit arrangement and is higher than the melting temperature of the pure solder metal. Insulating trenches are formed between the metal surfaces and adjacent contacts, which are arranged on the same main surface.
The metal surfaces include nickel and the solder metal includes gallium. The quantity of solder metal is dimensioned such that an intermetallic phase having a gallium component of a maximum of 25 percent by weight forms after the complete mixing with the material of the metal surfaces.
Additional metal surfaces, each of which are adjacent to one of the first-mentioned metal surfaces, are applied on the main surface of the respective other substrate. The first-mentioned metal surfaces are soldered to the adjacent additional metal
REFERENCES:
patent: 4285780 (1981-08-01), Schachter
patent: 5072075 (1991-12-01), Lee et al.
patent: 5274912 (1994-01-01), Olenick et al.
patent: 5590461 (1997-01-01), Ishida
Petent Abstract of Japan, E-1207, May 26, 1992, vol. 16, No. 227, for JP 4-42957 A 13 Feb. 1992, Manufacture of Semiconductor Integrated Circuit Device, Seiji Ueda, 1 sheet.
IEEE Micro, Bd. 13, (1993), Amalgams for Improved Electronics Interconnection, C.A. MacKay, pp. 46-58.
Microelectronic Engineering, 15, Oct. 1991, Results of the Tghree-Dimensional Integrated Circuits Probect in Japan, T. Moriya et al, pp. 167-174.
Symposium on VLSI Technology, Fabrication of Three-Dimensional IC Using "Cumulatively Bonded IC" (Cubic) Technology, Y. Hayashi et al, pp. 95-96.
Coan James F.
Siemens Aktiengesellschaft
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