Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2000-07-18
2002-10-22
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
C117S019000, C438S471000, C438S502000, C438S503000
Reexamination Certificate
active
06468881
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to silicon wafers utilized in the manufacture of semiconductor devices and to a method for producing a single crystal silicon used to prepare the wafers.
2. Discussion of the Background
A silicon wafer used in the manufacture of semiconductor devices may be obtained from a single crystal rod prepared by the Czochralski (CZ) method. In the CZ method, a silicon seed crystal is dipped into the silicon melt in a quartz crucible, and the seed crystal is then pulled up from the silicon melt while the seed crystal and the quartz crucible are rotated in opposite directions. The single crystal rod obtained is then sliced or otherwise processed to yield single crystal wafers.
Silicon wafers manufactured from the single crystal rod produced by the CZ method are known to have oxidation induced stacking faults on the surface due to thermal oxidation. The oxidation induced stacking faults usually generate in a ring shape and the area generated by the oxidation induced stacking faults is referred to as an OSF ring. In this application, the area where an OSF ring will generate after thermal oxidation but there is not an OSF ring because it is not receiving thermal oxidation, is also referred to as an OSF ring.
The OSF ring causes deterioration in the properties of semiconductor devices manufactured from the wafers. It has been observed that the physical properties of the outer portion of the ring differ from the properties of the inner portion of the ring. Dislocation clusters formed by aggregation of interstitial atoms are frequently generated on the outer portion of the OSF ring. However, the clusters seldom generate on the inner portion of the OSF ring. It is also known that an OSF ring will shift toward the outer region of a single crystal silicon as the pulling rate increases.
Because of the above circumstances, it has been observed that a single crystal silicon produced at a high pulling rate would have an OSF ring at the outermost peripheral region of the crystal. This region is not useful for forming semiconductor devices.
The inner portion of the OSF ring likewise presents problems. A cluster formed by aggregation of vacancy (i.e., vacancy cluster) is generated in this portion. This cluster causes a small pit when the surface of the wafer is etched. Since the pit is very small, this normally does not create a problem. However, since the integration density has significantly increased in recent years and pattern widths have become significantly finer, the presence of vacancy clusters is a problem for high grade single crystals.
A vacancy cluster does not exist on an epitaxial wafer produced from a single crystal silicon. Since epitaxial wafers are expensive, a single crystal silicon having low vacancy clusters has been produced by the CZ method. From this point of view, a lower pulling rate in contrast to the conventional method is desirable with respect to the production of a high grade crystal. A low pulling rate method is employed so that the OSF rings are generated on the inner portion rather than the outermost peripheral portion of the pulled crystal. In this way, defects are concentrated at the center of the crystal, or the OSF rings are caused to disappear at the center in order to provide improved yields of device.
With respect to the CZ method in which a high pulling rate is used so that the OSF rings are distributed at the outermost peripheral portion of the crystal, it is known that nitrogen doping to the silicon melt suppress the generation of vacancy clusters at the inner portion of the OSF ring. Japanese Patent Laid-Open No. 6-271399 discloses a nitrogen doping method by silicon nitride powder or nitrogen gas to the silicon melt. In addition, Japanese Patent Laid-Open No. 5-294780 discloses methods in which a poly-silicon is melted in an atmosphere of nitrogen gas, or a Float Zone silicon with nitrogen or a wafer which is coated with CVD silicon nitride film is used to add nitrogen to the poly-silicon.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a silicon wafer from a single crystal silicon in which the generation of dislocation clusters is effectively prevented on the outer and inner portions of the OSF rings.
It is another object of the invention to provide a method to manufacture a single crystal silicon in such a manner that the generation of dislocation clusters on the outer portion of the OSF ring and the generation of vacancy clusters on the inner portion are effectively prevented.
The present inventors unexpectedly found that the use of low pulling rate and the addition of nitrogen to the silicon melt was effective not only in suppressing vacancy clusters generated at the inner portion of the OSF ring but also in suppressing the formation of dislocation clusters generated at the outer portion of the OSF ring. In this way, high quality wafers could be produced which are essentially free of defects. It was also discovered that the concentration of nitrogen in the silicon melt should be maintained at a minimum level in order to attain the benefits of the invention.
REFERENCES:
patent: 6139625 (2000-10-01), Tamatsuka et al.
patent: 6261361 (2001-07-01), Iida et al.
patent: 6291874 (2001-09-01), Tamatsuka
patent: 60251190 (1985-12-01), None
patent: 05294780 (1993-11-01), None
patent: 06271399 (1994-09-01), None
patent: 08091993 (1996-04-01), None
patent: 10098047 (1998-04-01), None
Kubo Takayuki
Kuwahara Masanori
Le Dung Anh
Morrison & Foerster / LLP
Nelms David
Sumitomo Metal Industries Ltd.
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