Method for producing a semiconductor wafer, semiconductor...

Details Method for producing a semiconductor wafer, semiconductor... Method for producing a semiconductor wafer, semiconductor...

2005-11-01

2005-11-01

Nguyen, Ha Tran (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

C257S750000, C257S762000, C438S612000, C438S614000

Reexamination Certificate

active

06960829

ABSTRACT:
A semiconductor wafer is produced with an outer contact layer applied to the entire surface of an insulating layer and a rewiring layer embedded therein. At the same time, fuses are short-circuited. After the outer contact layer has been patterned and a passivation layer has been applied, outer contacts and short-circuit lines are uncovered. Outer contacts are introduced into passage openings in the passivation layer. The semiconductor structures are tested and predetermined short-circuit lines are interrupted. Then, the semiconductor wafer is diced into semiconductor chips.

REFERENCES:
patent: 3767397 (1973-10-01), Akiyama
patent: 5851911 (1998-12-01), Farnworth
patent: 5904556 (1999-05-01), Suzuki et al.
patent: 6573598 (2003-06-01), Ohuchi et al.
patent: 2002/0022373 (2002-02-01), Lehr et al.
patent: 2002/0084508 (2002-07-01), Le et al.
patent: 199 26 107 (2000-11-01), None
patent: 100 21 098 (2001-09-01), None

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