Method for producing a semiconductor package

Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating of groove or through hole

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216 20, 427 97, 427 98, 427123, 428901, H01B 514

Patent

active

060745673

ABSTRACT:
A semiconductor package includes a laminate of substrates having a cavity 16, through-holes 25 and circuit patterns, wherein the through-holes 45 and some of the circuit patterns 18 are coated with a plated nickel/gold coating 50. A method for producing the package comprises a step for producing a laminate by sandwiching circuit boards 20a, each having an opening 14 for the cavity and inner circuit patterns 18, with a pair of circuit boards 20b having no opening, a first plating step including first forming bores 44 for the through-holes and then applying a plated copper coating 48 to the inner wall of the through-hole or others, a step for forming outer circuit patterns on the circuit board 20b by the etching, and a step for opening the cavity 16 by providing an opening 60 in the circuit board 20b, and a second plating step for applying a plated nickel coating and a plated gold coating 50 to the inner circuit patterns 18 in the cavity 16, wherein a further step is interposed between the first plating process and the cavity-opening process, for applying a plated nickel coating 58 to the through-holes.

REFERENCES:
patent: 5306670 (1994-04-01), Mowatt et al.
patent: 5665473 (1997-09-01), Okoshi et al.
patent: 5911112 (1999-06-01), Kirkman

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