Method for producing a protective arrangement for a field-effect

Details Method for producing a protective arrangement for a field-effect Method for producing a protective arrangement for a field-effect

1987-04-06

1988-05-03

Ozaki, George T.

Fishing, trapping, and vermin destroying

437 59, 437904, H01L 21385, H01L 21425

Patent

active

047420154

ABSTRACT:
The invention relates to a protective arrangement for field-effect transistors with an insulated gate electrode. An integrated, indiffused protective diode whose breakdown voltage is smaller than that of the gate insulating layer is used therefor. The gist of the invention is that the breakdown voltage of the protective diode is set by two implantation processes, one of which is substantially limited to the region containing the in-diffused diode and the other of which substantially covers the surface of the substrate other than at least the channel region of the field-effect transistor so as to simultaneously increase the field inversion voltage.

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patent: 4066918 (1978-01-01), Huener et al.
patent: 4139935 (1979-02-01), Bertin et al.
patent: 4449158 (1984-05-01), Taira
S. Tokoda, "MOS Semiconductor Device ", Patents Abstracts of Japan, E-91, Jan. 23, 1982, vol. 6, No. 12.
S. Tokoda, "MOS Type Semiconductor Device", Patents Abstracts of Japan, E-138, Sep. 17, 1979, vol. 3, No. 111.
G. B. Stephens, "FET Gate Protection Diode with Asymmetric, Dual-Polarity Voltage Capability", IBM Technical Disclosure Bulletin, vol. 25, No. 1, Jun. 1982, pp. 400-401.
Electronics International, Oct. 6, 1982, pp. 70-71.
H. E. Maes et al., "The Implanted Zener Diode (IZD) as an Input Protection Device for MOS Integrated Circuits", IEEE Transactions on Electron Devices, vol. Ed.-28, No. 9, Sep. 1981, pp. 1071-1077.

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