Method for producing a PMOS transistor

Details Method for producing a PMOS transistor Method for producing a PMOS transistor

1995-05-02

1996-08-27

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437547, 437 44, H01L 21265

Patent

active

055500692

ABSTRACT:
A method for producing a PMOS transistor. A p doped substrate and an n doped trough are provided by implantation and subsequent diffusion. The transistor is insulated by means of a field oxide layer. The transistor gates are produced using a photolithographic pattern. The photoresist left from the photolithographic pattern after the gate is etched is used as the mask of the drain region at the gate-side end for at least one p.sup.- implantation. The thickness of the edge of the photoresist layer decreases towards the surface of the drain region at the gate edge. Due to this decreasing thickness, when the implant is introduced the flank (17, 19) of the implantation concentration profile (16, 18) is deflected towards the channel below the gate region.

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Badami, D. A., et al., "Tapered Photoresist For a Doping Profile", IBM Technical Disclosure Bulletin, vol. 26, No. 6, Nov. 1983, New York, pp. 2682-2683.

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