Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal
Reexamination Certificate
2000-01-25
2002-10-22
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
C438S037000, C438S046000, C438S936000, C438S956000, C257S096000, C257S097000, C257S102000, C372S045013, C372S046012
Reexamination Certificate
active
06468818
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for producing a semiconductor light-emitting device.
In order to form a high-luminance semiconductor light-emitting device, it is important to increase the light emission efficiency as well as to achieve the improvement of current injection into the light-emitting section and the effective takeout of light to the outside of the device. In order to improve the current injection into the light-emitting section, a current diffusion layer, an intermediate layer capable of increasing the operating voltage and so on are effective, and the current diffusion layer is also effective for the purpose of achieving effective takeout of light to the outside of the device.
FIG. 28
shows a sectional view of a semiconductor light-emitting device having a current diffusion layer and an intermediate layer (prior art reference of Japanese Patent Laid-Open Publication No. HEI 9-260724). Referring to
FIG. 28
, an n-type AlGaInP lower clad layer
212
, an AlGaInP active layer
213
and a p-type AlGaInP upper clad layer
214
are laminated on an n-type GaAs substrate
211
, and a p-type AlGaInP intermediate layer
215
and a p-type GaP current diffusion layer
216
are laminated on the above processed base. Further, a p-type electrode
217
, an n-type electrode
218
are formed by vapor deposition, completing a semiconductor light-emitting device. The composition of the p-type AlGaInP intermediate layer
215
is selected so as to satisfy the condition that its lattice matching factor is intermediate between that of the p-type AlGaInP upper clad layer
214
and that of the p-type GaP current diffusion layer
216
, the condition that its conduction band lower end is intermediate between the conduction band lower end of the upper clad layer and the conduction band lower end of the current diffusion layer and/or the condition that its valence band upper end thereof is intermediate between the valence band upper end of the upper clad layer and the valence band upper end of the current diffusion layer in an energy position prior to the formation of a junction for the lowering of a hetero barrier in the energy band profile.
In this semiconductor light-emitting device, a current can be injected into not only a portion just below the electrode but also the entire active layer due to the provision of the p-type GaP current diffusion layer
216
.
FIGS. 29A and 29B
show a band profile of a portion extending from the upper clad layer to the current diffusion layer. As shown in
FIG. 29B
, due to the provision of the p-type AlGaInP intermediate layer
215
, energy discontinuity can be divided and reduced as compared with the one that has no intermediate layer shown in FIG.
29
A. Therefore, the hetero barrier generated at the interface between the p-type AlGaInP upper clad layer
214
and the p-type GaP current diffusion layer
216
can be lowered. Furthermore, as compared with the one that employs no intermediate layer shown in
FIG. 30A
, according to this semiconductor light-emitting device shown in
FIG. 30B
, the lattice mismatching is alleviated by selecting a composition of a lattice constant of 5.55 Å that is intermediate between the lattice constant of 5.65 Å of the p-type AlGaInP upper clad layer
214
and the lattice constant of 5.45 Å of the p-type GaP current diffusion layer
216
. With this arrangement, interface state densities generated at the interface between the upper clad layer
214
and the current diffusion layer
216
can be reduced, allowing the reduction of warp of band profile caused by the interface state densities. Therefore, as shown in
FIG. 30B
, the energy barriers at the interface can be reduced. By virtue of the effect of reducing these energy barriers, the operating voltage can be sharply reduced.
In the aforementioned semiconductor light-emitting device, the lattice mismatching is alleviated by employing AlGaInP having a lattice constant of 5.65 Å for the upper clad layer
214
, employing AlGaInP having a lattice constant of 5.55 Å for the intermediate layer
215
and employing GaP having a lattice constant of 5.45 Å for the current diffusion layer
216
. In contrast to this, there is still existing a large lattice mismatching of a lattice matching factor &Dgr;a/a of about −1.8% between the p-type AlGaInP upper clad layer
214
and the p-type AlGaInP intermediate layer
215
and between the p-type AlGaInP intermediate layer
215
and the p-type GaP current diffusion layer
216
. If such a large lattice mismatching exists, then it is difficult to grow a layer having good crystallinity above the interface where the lattice mismatching occurs, and a great many crystal defects such as crosshatch and hillock occur. In the above semiconductor light-emitting device, a great many crystal defects occur in the p-type AlGaInP intermediate layer
215
and the p-type GaP current diffusion layer
216
, and the current diffusion and light transmittance are degraded in the current diffusion layer. This consequently causes degradation in light takeout efficiency and degradation in current injection efficiency. Furthermore, if the lattice mismatching exists, then a great many interface state densities occur at the interface. In this semiconductor light-emitting device, a great many interface state densities occur at the interface above and below the intermediate layer. As shown in
FIG. 30B
, the band profile from the upper clad layer to the current diffusion layer is alleviated by the intermediate layer, whereas the band profile at the hetero interface is sharply warped by the interface state densities, as a consequence of which the operating voltage is still not sufficiently lowered.
The aforementioned bad influence consequently causes a reduction in light takeout efficiency, a reduction in injection efficiency and an increase in operating voltage, and this leads to degradation in luminance, an increase in operating voltage and so on of the semiconductor light-emitting device. Furthermore, the crystal defects caused by the lattice mismatching exert many bad influences on the morphology of the surface of the semiconductor light-emitting device as well as the bad influences of the degraded adhesion of the electrode formed on the current diffusion layer and the disengagement of the electrode, and this leads to a reduced productivity as a consequence of a reduction in yield of production.
SUMMARY OF THE INVENTION
Accordingly, the object of the present invention is to provide a method for producing a high-productivity high-luminance semiconductor light-emitting device capable of operating at a low voltage.
In order to achieve the aforementioned object, the present invention provides a method for producing a semiconductor light-emitting device having a light-emitting section comprised of at least a lower clad layer, an active layer and an upper clad layer which are formed on a compound semiconductor substrate and a layer grown on the upper clad layer of the light-emitting section, wherein
when growing the layer on the upper clad layer from a crystal interface where crystal composition on the upper clad layer of the light-emitting section changes in a lattice mismatching state in which the absolute value of a lattice matching factor &Dgr;a/a between fore and hind crystals of the crystal interface is not lower than 0.25%, a growth rate at least at a start time of growth is made to be not greater than 1.0 &mgr;m/h.
According to the above method of the present invention, the crystallinity of the layer to be grown on an interface where the lattice mismatching exists can be improved by setting a growth rate of not greater than 1.0 &mgr;m/h at least in the initial stage of growth when growing the layer from a crystal interface where the crystal composition changes and there is a lattice mismatching of a lattice matching factor &Dgr;a/a of which the absolute value is not smaller than 0.25% between the fore and hind crystals. As a result, the transmittance of light emitted from the light-emitti
Nakamura Jun-ichi
Nakatsu Hiroshi
Sasaki Kazuaki
Diaz José R.
Lee Eddie
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
LandOfFree
Method for producing a high-luminance semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for producing a high-luminance semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing a high-luminance semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2946735