Method for producing a doublesided wiring board

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S846000, C029S842000, C029S830000, C427S097100, C205S209000, C174S262000, C361S748000, C216S018000

Reexamination Certificate

active

06571467

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a method for producing double-sided wiring boards including surface layer printed wiring boards and multi-layer double-sided wiring boards. More particularly, the invention relates to a method for forming wiring boards having high density circuits.
BACKGROUND OF THE INVENTION
Referencing
FIGS. 7-11
of the drawings, a conventional double-sided wiring board is produced as follows. First, a surface of copper foil
1
with a thickness of a few to tens of micrometers is roughened as shown in FIG.
7
(
a
). A double-sided copper-clad laminate can be used in place of the copper foil
1
. Then, as shown in FIG.
7
(
b
), after one surface of the copper foil
1
is coated with photosensitive insulating resin
2
, one or more via holes
3
are formed at predetermined positions of the coated photosensitive insulating resin
2
, and then the coated resin
2
is thermally cured. Next, as shown in FIG.
7
(
c
), after the back surface of the copper foil
1
is coated with photosensitive insulating resin
4
, one or more via holes
5
are formed at predetermined positions of the coated photosensitive resin
4
, and then the coated resin
4
is thermally cured. After surfaces of the thermally-cured photosensitive insulating resins
2
and
4
on both surfaces of the copper foil
1
are smoothened and roughened as shown in FIG.
7
(
d
), these surfaces are plated with copper to form circuit copper layers
6
and
7
as shown in FIG.
7
(
e
).
In the above copper-plating process, the copper foil
1
, on both surfaces of which the described photosensitive insulating resin layers
2
and
4
are formed, is immersed in a copper plating solution. However, as shown in the enlarged view of
FIG. 8
, a portion of the bottom part of the back surface of the copper foil
1
, which is exposed by the via hole
5
, is dissolved away, resulting in what is referred to as “haloing” (
8
) wherein an open portion is formed as shown in FIG.
8
. Please see more about this below. As a result, the via hole
5
on which this haloing is generated is poorly plated with copper. In order to solve this problem, the thicknesses of the copper layers
6
and
7
, including the haloed part
8
, is increased by a second copper plating, as shown in FIG.
9
. Then, the circuits
9
are formed from the copper layers
6
and
7
by applying a known photo-etching method. The result: a double-sided wiring board (
10
).
As stated, in the above-mentioned method, it is necessary to thicken the copper-plated layers
6
and
7
. However, doing so makes it difficult to form circuits
9
comprising fine lines. When the copper layers
6
and
7
are formed on the photosensitive insulating resins
2
and
4
by plating these resin surfaces with copper after via holes
3
and
5
are formed in the photosensitive insulating resins on both surfaces of the copper foil
1
, immersion of this structure in acidic solution (used as a catalyst in the chemical copper-plating process), results in the copper of the interface between the insulating layer
4
and the copper foil
1
(on the via hole) being dissolved. Thus, haloing occurs. As a result of such haloing, the contact surface between the copper layer
7
of the inner surface of the via hole
5
and the copper foil
1
of the bottom of the via hole
5
is not plated sufficiently with copper from only one copper plating. Thus, the thickness of the copper plating does not meet the standard, and reliability of the product cannot be secured. To solve this problem, a second copper plating process is implemented to secure enough thickness of copper-plated layers
6
and
7
at the bottom of the via hole
5
. As a result, the copper-plated layers
6
and
7
on the surface layer are also thickened. As stated, such thick layers make high density, fine wiring extremely difficult.
When haloing occurs at the bottom (the top in
FIG. 8
) of the via holes
5
, adhesive strength between the insulating resin
4
and the copper foil
1
is obviously diminished. Accordingly, as shown in
FIG. 11
, if spaces between via holes
5
are narrowed, the haloing
8
of via holes
5
may overlap each other, so that the adhesive strength between the insulating resin
4
and the copper foil
1
in the haloed parts
8
is even further diminished. In consequence, thermal stress in a soldering process may cause the peeling of copper foil
1
and insulating resin
4
, as well as the degradation of the resin's insulating properties.
For producing even greater density boards, both surfaces of the produced double-sided wiring board
10
are coated with photosensitive insulating resins
11
and
12
, preferably by the same process described above. The result: a double-sided wiring board
13
having circuits
9
in multi-layers as shown in FIG.
10
. In such production, the resin
12
cannot be filled into the via hole
5
on the back surface when the surface of the circuit
7
on the back surface are coated with the photosensitive insulating resin
12
because a “bubble”
14
may be generated inside of the hole (FIG.
10
). Therefore, as the number of via holes
5
or layers having the via holes
5
is increased, a supplementary step of filling photosensitive insulating resin
12
to remove this open spacing (“bubble”) must be utilized. For this reason, it has been difficult to increase board productivity.
As the result of a preliminary investigation, a Japanese Patent Publication (No. 64-8479) related to haloing was located. According to this publication, a chemical process for forming film of cupric oxide and then roughening said film surface is executed in order to improve adhesive strength between a copper foil circuit of a inner-layer printed wiring board comprising a copper-clad laminate board and a prepreg. However, in the chemical copper plating process, haloing may be generated on the wall of the through-hole(s). To solve this problem, this Japanese Patent Publication mentions roughening the copper-foil-circuit surface without damaging projections and forming recesses on the surface (and spoiling affinity) by using a solution of alkaline reducing agent to reduce cupric oxide film into cuprous oxide or copper metal.
DISCLOSURE OF THE INVENTION
An object of the present invention is to provide a method for producing a double-sided wiring board wherein a multi-layered conductive layer can be formed without haloing being generated.
Another object of the present invention is to provide a method for producing a double-sided wiring board wherein a via hole can be coated with insulating resin without any bubbles being formed in the hole during the process of making the board.
A further object of the present invention is to provide a method for producing a double-sided wiring board. More than one conductive layer can be formed without any haloing being generated in the process of producing the board.
According to one aspect of the invention there is defined a method for producing a double-sided printed wiring board which comprises the steps of providing a conductive substrate having first and second opposed conductive surfaces, forming a first insulating layer on the first conductive surface of the substrate, forming at least one via hole in the first insulating layer on the first conductive surface, thermally curing the first insulating layer on the first conductive surface, resulting in the second conductive surface having a first oxidized layer thereon, removing the oxidized layer formed on the second conductive surface of the conductive substrate, forming a second insulating layer on the second conductive surface of the conductive substrate from which the first oxidized layer is removed, forming at least one via hole in the second insulating layer and forming conductive wiring on the surfaces of both of the first and second insulating layers.
According to another aspect of the invention, there is defined a method for producing the double-sided wiring board comprising the steps of providing a conductive substrate having first and second opposed conductive surfaces, formin

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