Method for producing a compound semiconductor MIS FET

Details Method for producing a compound semiconductor MIS FET Method for producing a compound semiconductor MIS FET

1991-04-17

1993-01-05

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437912, 437944, H01L 21265

Patent

active

051770261

ABSTRACT:
A compound semiconductor MIS FET includes a channel layer produced on a semi-insulating substrate with an intervening buffer layer, source and drain electrodes produced directly on a predetermined region of the channel layer, and a Schottky barrier gate electrode produced on the channel layer between the source and drain ohmic electrodes and on an undoped semiconductor layer. A production method for such a compound semiconductor MIS FET includes removing by etching undoped semiconductor layer at source and drain electrode production regions to expose a channel layer existing therebelow before producing the source and drain electrodes, and producing ohmic electrodes on the exposed channel layer and producing a Schottky barrier gate electrode between the source and drain electrodes on the undoped layer.

REFERENCES:
patent: 4410903 (1983-10-01), Wieder
patent: 4737827 (1988-04-01), Ohta
patent: 4757358 (1988-07-01), Hovel et al.
patent: 4772925 (1988-09-01), Fukuzawa et al.
patent: 4795717 (1989-01-01), Okamura
Kim et al, "GaAs/AlGaAs . . . 18.5 GHz". IEEE Electron Device Letters, vol EDL-7, No. 11, Nov. 1986, pp. 638-639.

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