Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-11-21
2003-09-16
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S691000, C438S708000, C438S711000, C438S713000, C438S714000, C438S719000, C438S720000, C438S723000, C438S730000, C438S108000
Reexamination Certificate
active
06620735
ABSTRACT:
BACKGROUND INFORMATION
Methods for processing substrates are known in which a photoresist layer is applied to the substrate. This photoresist layer is structured by exposing it to light and removing the exposed areas. Thereafter follows a processing step in which the exposed areas of the substrate are attacked by a chemical etching solution. In this manner, recesses are introduced into the substrate's surface.
SUMMARY OF THE INVENTION
The method according to the present invention has the advantage that structuring of the substrate is done without using wet-chemical or dry-chemical etching processes. Therefore, samples and prototypes, but also mass produced items can be made especially fast and simply, with simpler demands on the structuring. The method according to the present invention is particularly environmentally friendly and cost-effective because of the omission of the chemical etching process.
Processing takes place in an especially simple manner in that the particles are carried along in a gas or fluid stream. As particles for the processing, in particular sand or ceramic particles, especially aluminum oxide, are suitable. Silicon, for example, is suitable as substrate, this material being used particularly for making cap structures for packaging sensor elements. Ceramics are further suitable substrate materials. Ceramics can be used, in particular, as carrier for thick-film or thin-film metallization, and semiconductor components can be fixed to the surface of such substrates. These semiconductor components are arranged in areas where the thickness of the ceramic substrate is reduced by the processing or where an opening has been put into the ceramic. This makes possible improved heat dissipation, positioning of bonding wire between printed circuit traces on the ceramic substrate and the semiconductor component and adjustment of the semiconductor component on the surface of the ceramic substrate are made easier. Furthermore, within the multi-layer ceramic, capacitor structures can be provided, the thickness of the ceramic substrate being reduced in this area in order to avoid cracks or delaminations due to mechanical stresses between the ceramic substrate and the metal layers. Advantageously, the method can also be used for structuring surface layers and for generating spacers.
REFERENCES:
patent: 3615470 (1971-10-01), Singletary, Jr.
patent: 5401690 (1995-03-01), Chen
patent: 5482660 (1996-01-01), Yamamoto et al.
patent: 6238829 (2001-05-01), Seki
patent: 6271161 (2001-08-01), Ryu et al.
patent: 02000346793 (2000-12-01), None
patent: 2000348606 (2000-12-01), None
Hoefer Holger
Pinter Stefan
Kenyon & Kenyon
Robert & Bosch GmbH
Yevsikov V.
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