Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2002-01-30
2003-10-14
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
With measuring or testing
Reexamination Certificate
active
06632689
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor processing, and more specifically, to enclosures and associated parts used in the processing of semiconductors.
BACKGROUND OF THE INVENTION
Semiconductor wafers are processed in various chambers that are elevated to predetermined temperatures and pressures. For example, commonly used chambers in processing are physical vapor deposition (PVD) chambers, chemical vapor deposition (CVD) chambers and etch chambers (PECVD). Such chambers typically use quartz, SiO
2
. For some applications, the interior surface of a quartz enclosure may be desired to be rough depending upon the type of processing that is occurring. Examples where a rough surface is desired include an RF (radio frequency) pre-clean chamber and an plasma enhanced CVD chamber. The rough surface is desired because deposition materials are applied to the inside surface of the enclosure. A rough surface provides more surface area to allow a deposition material to better adhere as compared to a smooth surface.
One known technique for roughening the surface of an RF pre-clean chamber enclosure is to use grit blasting wherein silica or ceramic beads are directed to the surface to create pits. The resulting surface appears pitted. After the grit blasting, a cleaning step of the surface is required to remove the silica that has remained on the surface. Unfortunately not all of the silica is removable as the force of impact lodges silica particles into the interior surface of the enclosure. After the cleaning step, the enclosure is installed and the deposition film is applied to seal the silica to prevent the silica from being deposited during the subsequent processing. However, when subjected to a high temperature and high pressure environment as well as certain electrical and chemical reactions, the deposition film begins to wear and flake off. The flakes as well as the silica fall onto a wafer being processed within the enclosure and result in killer defects and reduced die yield.
Additionally, prior to the deposition film and silica beginning to flake off and cause defects, the enclosure must be removed from productive activity and again subjected to a grit blasting technique. Another chemical cleaning is required prior to re-installing and forming another sealing film. Thus in known semiconductor processing lines, enclosure surfaces of some chambers typically are a source of processing defects, must be removed periodically from productive operation, and require significant continual maintenance expense.
REFERENCES:
patent: 5569423 (1996-10-01), Belunova et al.
patent: 5807416 (1998-09-01), Kemmochi et al.
patent: 5976900 (1999-11-01), Qiao et al.
Denning Dean J.
Martin Richard E.
Clingan, Jr. James L.
Hoang Quoc
King Robert L.
Motorola Inc.
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