Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes
Patent
1992-08-14
1994-05-10
Hoff, Marc S.
Coded data generation or conversion
Digital code to digital code converters
To or from run length limited codes
360 46, 360 32, G11B 509
Patent
active
053111788
ABSTRACT:
The present invention describes an improved RLL channel utilizing a closed-loop clock recovery scheme and a simplified decoding algorithm. (1,7) run-length-limited (RLL) code is used to reduce the magnetic nonlinearity problem posed by prior art PRML systems. In the preferred embodiment of the present invention, the analog data signal amplified, filtered and equalized to approximate an ideal waveform. The signal is then sampled and decoded into binary data. The clock recovery circuit is designed to sample the analog data such that the signal peak lies centered between consecutive sample points. It is thus made possible for the phase error to be extracted from a direct comparison of neighboring sample values. The phase error is then used to adjust the clock signal for the following samples. In the decoding algorithm of the present invention, by making useful approximations, the complexity of the decision functions is reduced, along with the number of required look-ahead samples. The reduction in look-ahead samples reduces the system's sensitivity to misequalization.
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Pan Tzu-Wang
Yamasaki Richard G.
Hoff Marc S.
Silicon Systems Inc.
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