Method for processing multiple semiconductor devices for test

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S655000

Reexamination Certificate

active

06905891

ABSTRACT:
A packaged array (10) having a temporary substrate (20) is used to test a plurality of semiconductor devices (14). In one embodiment, the temporary substrate (20) is an adhesive substrate, such as tape. A support structure (18) may lie over the temporary substrate (20) or be within the temporary substrate (20). The plurality of semiconductor devices (14) lie within an array (16, 6,or8) and may be tested in parallel. One array or a multiple number of arrays may lie on the packaged array (10).

REFERENCES:
patent: 4720317 (1988-01-01), Kuroda et al.
patent: 5888882 (1999-03-01), Igel et al.
patent: 5911329 (1999-06-01), Wark et al.
patent: 6251695 (2001-06-01), Kwon
patent: 6551845 (2003-04-01), Moden et al.
patent: 2002/0016013 (2002-02-01), Iketani
patent: WO 90/09093 (1990-08-01), None
patent: WO 92/14263 (1992-08-01), None
Dictionary of Science and Technology, Academic Press, p. 2125.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for processing multiple semiconductor devices for test does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for processing multiple semiconductor devices for test, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for processing multiple semiconductor devices for test will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3483343

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.