Method for processing data by utilizing hierarchical cache memor

Details Method for processing data by utilizing hierarchical cache memor Method for processing data by utilizing hierarchical cache memor

1995-03-01

1998-02-10

Chan, Eddie P.

395470, 395471, 395463, 395455, 395440, G06F 1208

Patent

active

057178909

ABSTRACT:
A method for processing data by utilizing hierarchial cache memories in a system where a lower cache is connected between a processor and a higher cache memory and the higher cache memory is in turn connected to a main memory or connected through a serial arrangement of higher cache memories to the main memory. When a cache miss occurs in the lower cache and the lower cache is full of "dirty data", the data is not written to the main memory but instead to the higher cache. Dirty data is written into the main memory when at least all of the cache memories are filled with dirty data and a cache miss occurs.

REFERENCES:
patent: 4797814 (1989-01-01), Brenza
patent: 4811209 (1989-03-01), Rubinstein
patent: 4835686 (1989-05-01), Furuya et al.
patent: 4939641 (1990-07-01), Schwartz et al.
patent: 5058006 (1991-10-01), Durdan et al.
patent: 5241641 (1993-08-01), Iwasa et al.
patent: 5249282 (1993-09-01), Segers
patent: 5386547 (1995-01-01), Jouppi
"Multilevel Cache Hierarchies: Organizations, Protocols, and Performance", Jean-Loup Baer and Wen-Han Wang; Academic Press 1989.

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