Semiconductor device manufacturing: process – Chemical etching – Altering etchability of substrate region by compositional or...
Reexamination Certificate
2007-06-12
2007-06-12
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Altering etchability of substrate region by compositional or...
C438S725000, C257SE21250
Reexamination Certificate
active
11216524
ABSTRACT:
A resist layer is deposited a resist layer on a first layer of a layered stack. The stack also includes a second layer below the first layer. The resist layer is processed with a lithographic method to achieve a first structured resist layer. At least a part of the first structured resist layer is trimmed to achieve a second structured resist layer having at least in parts a structure with a critical dimension smaller than obtainable by processing the resist with a lithographic method. The first layer is selectively removed from the second layer in the areas not covered by the second structured resist layer. The second layer is modified by implantation to become a layer with defined selectivity to the non-modified material. The remains of the first layer are removed. The non-modified structures of the second layer are removed to create a hardmask layer by the remaining layer. The layered stack is further structured with the hardmask layer.
REFERENCES:
patent: 6197687 (2001-03-01), Buynoski
patent: 6762130 (2004-07-01), Laaksonen et al.
patent: 6914293 (2005-07-01), Yoshino
Coleman W. David
Slater & Matsil L.L.P.
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