Semiconductor device manufacturing: process – With measuring or testing
Patent
1997-08-05
1999-03-16
Dutton, Brian
Semiconductor device manufacturing: process
With measuring or testing
324765, G01R 3126, H01L 2166
Patent
active
058829474
ABSTRACT:
A method for probing the error of energy or dosage in the high-energy ion implantation is disclosed herein. The error source that is from either the energy of ion implantation or the dosage of ion implantation non-normal is decided via the thermal signal value and the thickness of the remained oxidation layer after etching step. The error source can be decided by using different decision standards for phosphorous ion implantation or boron ion implantation. The method comprises the steps as follow: a semiconductor silicon wafer is provided as a test wafer, and an oxidation layer is then formed over the test wafer. A high-energy ion implantation, such as phosphorous ion implantation or boron ion implantation is performed. The oxidation layer is etched via an etching process in a fixing etching time. The thickness of the remained oxidation layer after the etching process is probed. A thermal probe is applied to probe the thermal wave signal from the ion-implant-induced damage. Afterward, the thermal wave signal value and the remained oxidation thickness of the high-energy ion implantation are compared with that of a preceding standard group. Then, the different decision standards created from the thermal wave signal value and the remained oxidation thickness for the high-energy phosphorous or boron ion implantation process are submitted. The error source that is from either the energy of ion implantation or the dosage of ion implantation in non-normal state can be decided via the different decision standards.
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patent: 4522510 (1985-06-01), Rosencwaig et al.
patent: 5185273 (1993-02-01), Jasper
patent: 5834364 (1998-11-01), Brun et al.
Chen Ben
Chen Eddie
Lin Jen-Tsung
Dutton Brian
United Microelectronics Corp.
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