Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2000-02-15
2001-09-11
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
Reexamination Certificate
active
06288558
ABSTRACT:
BACKGROUND
1. Technical Field
This disclosure relates to semiconductor testing and more particularly, to a method for measuring electrical characteristics of a single active device on a semiconductor chip.
2. Description of the Related Art
Semiconductor devices are fabricated and tested by employing pattern generators and testers. Also, visual inspections of wafers are employed to determine defects or other abnormalities on the wafers. In some instances, testing is extended to determine failure modes which are experienced in a lot of wafers or on an individual chip. These failure modes determine why or how a failure has occurred. In such instances, it is desirable to focus in detail on the mechanisms which caused failures or on the components which have failed.
In semiconductor memory devices, the characteristics of transfer gates (transistors) in an electrical circuit are among the main parameters, which define the function and performance of semiconductor devices. Usually the design of electrical circuits does not permit an individual probing of a source and drain of a transistor without prior modification of the device. This is especially true in the case of a dense array of memory cells in deep trench (DT) technology. Important information about the characteristics of these cells is mainly based on the performance of specially designed kerf (test) structures (e.g. embedded nominal device). These test structures do not provide information about particular devices themselves, however. It would be beneficial to be able to test a single memory cell in an array of cells for a better understanding of leakage mechanisms and cell performance in an actual device.
Therefore, a need exists for a method for testing individual devices on a semiconductor device.
SUMMARY OF THE INVENTION
A method for probing a semiconductor component for an active single device test, in accordance with the present invention, includes providing a semiconductor device to be tested and accessing at least one component of the semiconductor device by simultaneously milling a hole and depositing a plug in the hole to connect to the at least one component. A circuit is provided through the plug to make electrical measurements of the semiconductor device.
A method for probing a semiconductor component during destructive testing of an active single device includes the steps of providing a semiconductor device to be tested and accessing at least one component of the semiconductor device by milling a hole in a dielectric layer over the component while simultaneously depositing a plug in the hole to electrically connect the at least one component to the plug. A circuit is provided through the plug to make electrical measurements of the semiconductor device, and probe pads are deposited on other components to complete electrical paths for measuring electrical characteristics of the semiconductor device.
Another method for probing a single active memory cell during destructive testing includes the steps of providing a semiconductor device with a memory cell to be tested, accessing a storage node of the memory cell by employing an ion beam to simultaneously mill a hole and deposit a plug in the hole through a dielectric layer, the plug being formed in alignment with the storage node to connect to the storage node and providing a circuit through the plug to make electrical measurements of the semiconductor device by employing the plug to short a wordline to the storage node.
In alternate methods, the step of accessing may include the steps of forming the hole through a dielectric layer covering the at least one component by employing a first portion of an ion beam and depositing platinum in the hole to simultaneously extend the hole into the at least one component and to fill the hole with platinum by employing a second portion of the ion beam. The hole may be less than or equal to about 0.4 microns in diameter. The step of providing a circuit through the plug to make electrical measurements of the semiconductor device may include the step of employing the plug to connect the at least one component to a conductive line existing in a structure of the semiconductor device. The step of measuring electrical characteristics through the plug by probing the conductive line may be included. The step of providing a semiconductor device to be tested may include the step of providing a deep trench capacitor memory cell to be tested. The step of accessing at least one component may include the step of accessing a storage node of the deep trench capacitor. The method may further include the step of measuring electrical characteristics through the plug by probing a contact connected to the wordline. The method may include the step of de-layering the semiconductor device to expose the dielectric layer.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
REFERENCES:
patent: 5930639 (1999-07-01), Schuele et al.
patent: 5949238 (1999-09-01), Marquis
patent: 6150718 (2000-11-01), Livengood et al.
Johnston Mark
Zimmermann Gunnar
Braden Stanton C.
Infineon - Technologies AG
Leroux E P
Metjahic Safet
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