Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-06-21
2005-06-21
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S401000, C438S975000
Reexamination Certificate
active
06908830
ABSTRACT:
A method of repeatedly exposing a pattern across a wafer in a sequential stepping process is disclosed. The pattern that is exposed includes at least one alignment mark. Each time the exposing process is repeated, the current exposure overlaps a portion of the wafer where the pattern was previously exposed and thereby erases a previously exposed alignment mark by re-exposing an area of the wafer where the previously exposed alignment mark was located. After the exposing process is repeated across the wafer, alignment marks remain only in the last exposed areas of the wafer.
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Lu Andrew
Odiwo Donald M.
Yerdon Roger J.
Ghyka Alexander
International Business Machines - Corporation
Li, Esq. Todd M. C.
McGinn & Gibb PLLC
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