Method for preventing the formation of electrical shorts via...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric

Reexamination Certificate

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C438S422000, C257SE21319

Reexamination Certificate

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07741191

ABSTRACT:
Densely spaced gates of field effect transistors usually lead to voids in a contact interlayer dielectric. If such a void is opened by a contact via and filled with conductive material, an electrical short between neighboring contact regions of neighboring transistors may occur. By forming a recess between two neighboring contact regions, the void forms at a lower level. Thus, opening of the void by contact vias is prevented.

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Foreign associate transmittal letter dated Jan. 24, 2008.
Translation of Official Communication issued Dec. 18, 2007.

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