Electricity: electrical systems and devices – Safety and protection of systems and devices – Feeder protection in distribution networks
Reexamination Certificate
2001-12-28
2003-07-22
Tso, Edward H. (Department: 2830)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Feeder protection in distribution networks
Reexamination Certificate
active
06597552
ABSTRACT:
FIELD OF THE INVENTION
The invention generally relates to a method for preventing tapping into existing short circuits in branches by a power supply momentarily being connected in a test circuit at a defined instant of the power supply voltage, wherein at least the current is detected in a test time period and is evaluated as a criterion for a short circuit. The invention more preferably relates to the associated arrangement for carrying out the method. More preferably, it relates to a diagnosis and protection circuit for the power supply branch, which contains at least one semiconductor switch whose current can be integrated over a test time period and whose time integral can be evaluated as a decision criterion for a short circuit.
BACKGROUND OF THE INVENTION
Power switches, in particular, and also the rest of the operating equipment, are stressed very greatly by the switching-on of a branch afflicted with a short circuit. The reason for this is that the stress duration and hence the Joule heat integral and the forward current are very high as a result of the switch-on operation that must be ended, and the subsequent switch-off operation.
The latter refers to the fact that it is desirable, in the case of a branch to be switched on, to automatically test the branch in advance for a possible short circuit, and to block the connection if a faulty installation is present. In this case, the test duration should be short enough so that the switching action is not appreciably delayed and the loading on the installation remains low. In order to be able to detect insulation damage in the case where the breakdown occurs at higher voltages, the test voltage should correspond approximately to the peak value of the power supply voltage, but not be significantly higher than the latter, in order to prevent additional insulation damage.
EP 0 563 695 A2 has already previously disclosed a method in which the power supply is momentarily connected at the peak value of the power supply voltage, for which purpose a GTO (Gate Turn Off thyristor), in particular, is used. In this case, the time integral of the current in the test time period is used as a decision criterion for the presence of a short circuit, so that a short circuit is identified when a threshold value is exceeded. In this method, the current is limited only by the internal resistance of the power supply and by the forward resistance of the GTO. Thus, in power supplies with a high prospective short-circuit current, in the fault situation currents flow which can no longer be switched by a GTO according to the prior art.
Furthermore, DE 196 01 878 A1 discloses a connection arrangement for load networks which effects a connection in the short-circuit-free state within permissible operating quantities by means of at least one switching path. In this case, a connection path in parallel with the load and a bridge path serve, in the sense of a voltage divider, additionally for providing protection against making in the short-circuit situation.
SUMMARY OF THE INVENTION
Taking this as a departure point, it is an object of the invention to specify a method and to provide an associated circuit arrangement with which the presence of short circuits is identified and tapping into short circuits existing in branches can be prevented even in power supplies with a very high prospective short-circuit current.
In the case of a method and an apparatus of the type mentioned in the introduction, the object is achieved according to the invention, for example, by the procedure in accordance with patent claim 1 and the features in accordance with patent claim 10, respectively. Advantageous developments are specified in the respective dependent claims.
In the case of one embodiment of the invention, an additional test impedance is used, solely the test current and the voltage being evaluated in order to identify the short circuits. With such a test impedance, the maximum test current that is to be turned off by the semiconductor switch preferably used can advantageously be limited to a predetermined value. In this case, the value RB of such a test impedance must be significantly greater than the power supply impedance.
The method according to an aspect of the invention makes it possible, in the case of single-phase testing, to effect a direct evaluation of test current and test voltage for the purpose of identifying short circuits between conductor and ground in the individual branches of the line power supply. However, the method can also be extended to three-phase power supplies, it being possible to identify ground or neutral conductor faults and also external conductor faults inter se and the individual short circuits being able to be discriminated.
In the case of an arrangement in accordance with an embodiment of the invention, a test resistor which has a defined resistance R
B
and whose resistance R
B
is significantly greater than the power supply impedance Z
power supply
is arranged in the test circuit in series with the semiconductor switch used in the test circuit. In the application for three-phase testing, each semiconductor switch is preferably assigned a dedicated test resistor. Since the individual branches are tested one after the other, there may be present common units for driving alternatively one of the semiconductor switches or a common superordinate control unit.
REFERENCES:
patent: 4894745 (1990-01-01), Akagawa et al.
patent: 196 01 878 (1997-07-01), None
patent: 0 563 695 (1993-10-01), None
Griepentrog Gerd
Hochgraef Holger
Maier Reinhard
Harness & Dickey & Pierce P.L.C.
Siemens Aktiengesellschaft
Tso Edward H.
LandOfFree
Method for preventing making on electrical short circuits... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for preventing making on electrical short circuits..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for preventing making on electrical short circuits... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3003460