Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Patent
1997-12-22
2000-11-28
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
438750, 438753, 438754, 438757, H01L 21302
Patent
active
061535311
ABSTRACT:
Disclosed is a method for fabricating reliable interconnect structures on a semiconductor substrate that has at least a first dielectric layer, a first patterned metallization layer, a second dielectric layer over the first patterned metallization layer, and a plurality of tungsten plugs formed in the second dielectric layer. The method includes patterning a second metallization layer that overlies the second dielectric layer and the plurality of tungsten plugs, such that the patterning leaves at least one of the plurality of tungsten plugs not completely covered by the second metallization layer. Submersing the semiconductor substrate into a dilute nitric acid solution until a passivating tungsten oxide is formed over a portion of the at least one of the plurality of tungsten plugs that is not completely covered by the second metallization layer. The method further includes submersing the semiconductor substrate into a basic cleaning solution, and the passivating tungsten oxide is configured to prevent the at least one of the plurality of tungsten plugs from eroding in the basic cleaning solution. Preferably, the dilute nitric acid solution is adjusted to have a pH level of between about 1.5 and about 3 so that the passivating tungsten oxide becomes insoluble.
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Bothra Subhas
Patel Jay
Philips Electronics North America Corporation
Utech Benjamin L.
Vinh Lan
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