Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-02-08
2001-05-15
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S612000, C438S623000, C438S624000, C438S706000, C134S001200, C134S001300
Reexamination Certificate
active
06232238
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for preventing corrosion of a bonding pad on a surface of a semiconductor wafer, and more particularly, to a method for preventing corrosion of a bonding pad resulting from residual polymers on a surface of a semiconductor wafer.
2. Description of the Prior Art
In a semiconductor process, when all devices and metallic connections are formed on a semiconductor wafer, insulating layers are deposited or coated on a surface of the wafer to passivate their underlying integrated circuits, and a plurality of holes is then etched into the insulating layers so as to expose bonding pads formed on the surface of the wafer. The bonding pads are used to connect external devices through a wire bonding process to enable transmissions of electric signals from the wafer to external devices. Generally, the insulating layers and the plurality of holes are formed in an integrated circuit (IC) foundry, and the wafer is transported to an IC packaging factory for performing the wire bonding process. Because the wire bonding process is performed several days after forming the insulating layers and the holes, the bonding pads are exposed to open air for a long time causing a chemical reaction to occur. This chemical reaction will damage the bonding pads thus making the entire wafer abandoned.
Please refer to FIG. l.
FIG. 1
is a flowchart of a prior art process
10
of forming insulating layers and holes on bonding pads of a wafer. The process
10
is performed in an IC foundry in five steps when patterns are transferred onto the wafer: First, deposit a passivation layer on the wafer; second, coat a polyimide layer on the passivation layer; third, remove polyimide above the bonding pads through a photolithographic process; fourth, cure remaining polyimide on the wafer; fifth, perform a dry etching process in areas where the polyimide is removed to expose the bonding pads. When the process
10
is completed, the wafer is transported from the IC foundry to the IC packaging factory to perform the wire bonding process.
The dry etching process in the fifth step is performed by using a mixed gas comprising carbide, sulphide and fluoride, and commonly causes the mixed gas to generate polymers. The polymers will remain on the bonding pads when the dry etching process is completed, and will react with water vapors to generate acidic chemicals. Because the polyimide is organic photo-resist, using a solvent to clean off the polymers is not possible. Moreover, the acidic chemicals are sources of corrosion of the bonding pads. Thus, the bonding pads will become damaged and the entire wafer will be abandoned.
SUMMARY OF THE INVENTION
It is therefore a primary objective of the present invention to provide a method for preventing corrosion of a bonding pad resulting from residual polymers on the bonding pad to solve the above mentioned problems.
In a preferred embodiment, the present invention comprises a method for preventing corrosion of a bonding pad on a surface of a semiconductor wafer. The bonding pad is a metallic layer formed on the surface of the semiconductor wafer. The semiconductor wafer comprises an inorganic passivation layer positioned above the bonding pad, and an organic dielectric layer positioned above the passivation layer. The passivation and dielectric layers comprise a hole etched to the bonding pad. The method uses an organic solution to clean off residual polymers on the surface of the bonding pad inside the hole to prevent corrosion of the bonding pad.
It is an advantage of the present invention that the organic solution can clean off residual polymers on the surface of the bonding pad so that corrosion of the bonding pad can be prevented.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment which is illustrated in the various figures and drawings.
REFERENCES:
patent: 5412868 (1995-05-01), Nguyen et al.
patent: 5780406 (1998-07-01), Honda et al.
patent: 5792672 (1998-08-01), Chan et al.
Wolf and Tauber, Silicon Processing for the VLSI Era, vol. 1, 1986, Lattice Press, pp 546-555.*
Wolf, Silicon Processing for the VLSI Era, vol. 2, 1990, Lattice Press, pp 273-275.
Chang Yi-Chun
Chen Jain-Hon
Hsu Winston
Nguyen Ha Tran
Niebling John F.
United Microelectronics Corp.
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