Etching a substrate: processes – Forming or treating electrical conductor article
Reexamination Certificate
2001-10-29
2003-06-24
Utech, Benjamin L. (Department: 1765)
Etching a substrate: processes
Forming or treating electrical conductor article
C216S017000, C216S020000, C174S250000, C174S259000, C174S260000, C029S846000, C029S854000
Reexamination Certificate
active
06582616
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates, in general, to a method for preparing a high performance BGA board and, more particularly, to a method for preparing a high performance BGA board containing a plurality of printed circuit boards in which a conductor circuit, a bonding pad to be electrically connected to a semiconductor chip, and an inner hole for mounting a semiconductor chip are formed by primary- and secondary-laminating a plurality of boards.
2. Description of the Prior Art
The great advance in the electronics industry is, at least in part, based on the development of the electronic parts industry. As electronic parts have been developed into slim ones of high performance, they can be more highly integrated in one board. To the development of electronic parts, multi-layer printed circuit boards make a contribution.
With the aim of mounting highly integrated electronic parts thereon, multi-layer printed circuit boards have a structure in which elemental boards having a plurality of circuits are laminated. Multi-layer printed circuit boards may have various forms, and be manufactured by various methods.
For example, Japanese Patent Publication No. Hei. 5-183272 discloses a method for manufacturing a multilayer board for mounting electronic parts, in which a multilayer board is prepared which is formed by bonding a substratum wherein a recessed part for mounting electronic parts and a conductor pattern are formed, an adhering layer, and an upper layer board provided with an opening part. Through-holes are formed in the multilayered board. After a sheet type mask covering an opening part is thermo-compression bonded to the uppermost part of the multilayered board, the whole surface of the multilayered board and through-holes are plated with copper. Conductor patterns are formed on the upper part and the lower part by an etching process, and then the sheet type mask is eliminated from the upper part. The above method makes use of a separate mask to cover the aperture part of the inner hole in order to prevent a conductor pattern exposed at a recessed part for mounting electronic parts from being damaged when manufacturing a multilayered board for mounting electronic parts. This conventional method, however, has problems in that there are required additional processes of using a mask only to protect an inner hole and subsequently eliminating the mask from the multilayered board.
To avoid the problem that conventional boards have, much effort has been made to manufacture boards that are of a high multi-layer structure and of excellent thermal stability. In the boards, semiconductor chips are bonded onto heat sinks while binding to bonding pads in the form of steps.
There are disclosed various methods for establishing heat sinks in printed circuit boards. For example, Japanese Patent Publication No. Hei. 10-116933 discloses a multi-layer printed wiring board for mounting IC, in which a heat sink is fixed firmly on a laminated structure by soldering, with IC being fixed firmly on the heat sink via a resin adhesive. In addition, opening parts are made on each board as well as the outermost board; through-holes are established in the laminated board; the walls of the through-holes and the outer layer surface of the board laminate are plated with metal; and a conductor circuit is provided onto the outermost board. The conductor circuit patterned on the outermost board is made by etching the metal coating plated on the surface of the outermost board.
When patterning the conductor circuit on the outermost board and plating the through-holes and outer layer of the multilayered printed circuit board, however, the opening parts and a surface of the mounting part may be contaminated with the plating liquid and the etchant. Another problem with the conventional method is the contamination that inevitably occurs because a bonding pad of the inner layer circuit provided to each board is formed in each opening part.
In order to overcome the problem, the surface of the opened mounting part should be coated with a resist film before forming a conductor circuit by plating and etching, and then the resist film should be eliminated. Alternatively, a mask may be used. The method, therefore, suffers from the disadvantage of requiring the additional step of plating or the additional step of using and eliminating a mask in order to protect an inner hole.
As described above, boards of prior arts are fabricated in complicated processes at high production cost. Also, it is difficult to obtain miniaturized and high performance electronic parts by use of boards of the prior arts.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to solve the above problems, and to provide a method for preparing a high performance BGA board in which contamination due to an outer layer surface treatment of the board laminate can be prevented and an additional process for preventing a contamination of an inner hole can be omitted.
It is another object of the present invention to provide a method for preparing a high performance BGA board in which a defective proportion can be reduced remarkably in comparison with prior arts by applying a pressure uniformly during a secondary lamination without an additional process.
It is further object of the present invention to provide a method for preparing a high performance BGA board which has an ideal ball pitch and multi-fins, excellent electrical and thermal properties, and also can be applied in the case of high current, and can be easily mounted on a chip.
In accordance with the first aspect of the present invention, the method for preparing the BGA board containing a plurality of printed circuit boards, in which a conductor circuit, an inner hole for mounting a semiconductor chip and a bonding pad to be electrically connected with the semiconductor chip are formed, comprising the steps of:
a) providing top and bottom boards having neither inner hole nor conductor circuit, a board to contact with a bottom side of said top board in which an inner hole is established without a conductor circuit, and at least one of boards in which a conductor circuit and an inner hole are established;
b) forming a primary-laminated structure having an opening part in an upper part thereof, by arraying the lower boards except said top board, and laminating the lower boards together by use of an adhesive to form a step-typed combination of the inner holes;
c) forming a secondary-laminated structure by overlaying said top board onto the primary-laminated structure by use of the adhesive;
d) forming through-holes in the secondary-laminated structure, followed by establishing a conductor circuit on the secondary-laminated structure including the through-holes by copper plating, dry film lamination, exposure, developing and etching; and
e) removing a part of said top board which covers the step-typed combination of the inner holes to form a cavity with the upper end opened, followed by providing a bonding pad in the cavity to give an individual BGA board.
In accordance with the second aspect of the present invention, the method for preparing the BGA board containing a plurality of printed circuit boards, in which a conductor circuit, an inner hole for mounting a semiconductor chip and a bonding pad to be electrically connected with the semiconductor chip are formed, comprising the steps of:
a) providing top and bottom boards having neither inner hole nor conductor circuit, a board to contact with a bottom side of said top board in which an inner hole is established without a conductor circuit, and at least one of boards in which a conductor circuit and an inner hole are established;
b) forming a primary-laminated structure with an opening part in an upper part thereof, by arraying the lower boards except said top board, and laminating the lower boards together by use of an adhesive to form a step-typed combination of the inner holes;
c) forming a secondary-laminated structure by overlaying said top board onto the primary-laminated
Kang Myung-Sam
Kim Won-Hoe
Park Keon-Yang
Ahmed Shamim
Morgan & Lewis & Bockius, LLP
Samsung Electro-Mechanics Co. Ltd.
Utech Benjamin L.
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