Method for precision assembly of integrated circuit chip...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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C138S107000, C138S108000, C138S109000, C138S110000, C138S125000, C257SE21499, C257SE21500, C257SE21505, C257SE21506, C257SE21508

Reexamination Certificate

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07615405

ABSTRACT:
An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

REFERENCES:
patent: 6569710 (2003-05-01), Pierson
patent: 2003/0230801 (2003-12-01), Jiang et al.
patent: 2006/0027934 (2006-02-01), Edelstein et al.
patent: 2008/0036084 (2008-02-01), Buchwalter et al.

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